|over 1 year ago||about 1 month ago|
|BSD 3-clause "New" or "Revised" License||BSD 3-clause "New" or "Revised" License|
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For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
We haven't tracked posts mentioning riscv yet.
Tracking mentions began in Dec 2020.
Are there any dual-GBE, PoE-capable SBCs?
2 projects | reddit.com/r/linuxhardware | 20 Aug 2021
Chinese Academy of Sciences releases "Xiangshan", a high performance open source RISC-V processor that runs Linux
5 projects | reddit.com/r/linux | 26 Jun 2021
Just found https://github.com/darklife/darkriscv whose (incomplete) core is surprisingly short. Which means you won't have to learn a lot. You can run it in simulator or on one of the listed fpga boards.
What are some alternatives?
biriscv - 32-bit Superscalar RISC-V CPU
XiangShan - Open-source high-performance RISC-V processor
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
Cores-VeeR-EH1 - VeeR EH1 core
zipcpu - A small, light weight, RISC CPU soft core
friscv - RISCV CPU implementation in SystemVerilog
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
scr1 - SCR1 is a high-quality open-source RISC-V MCU core in Verilog
open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
meta-riscv - OpenEmbedded/Yocto layer for RISC-V Architecture