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OpenFPGA

CFU-Playground
Mentions
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 Stars Project Description
4 54
wokwi-verilog-gds-test
3 1,302
verilog-ethernet
 Verilog Ethernet components for FPGA implementation
3 323
wb2axip
 Bus bridges and other odds and ends
2 2,209
picorv32
 PicoRV32 - A Size-Optimized RISC-V CPU
2 994
corundum
 Open source FPGA-based NIC and platform for in-network compute
2 299
vroom
 VRoom! RISC-V CPU
2 196
openc906
 OpenXuantie - OpenC906 Core
2 4
adi_adrv9371_zc706
 adi's adrv9371 example integration with DVB-S2 IP
2 2
alpha68k
 alpha denshi 68k
1 212
SCALE-MAMBA
 Repository for the SCALE-MAMBA MPC system
1 97
dspfilters
 A collection of demonstration digital filters
1 67
ARM-LEGv8
 Verilog Implementation of an ARM LEGv8 CPU
1 65
ARM7
 Implemetation of pipelined ARM7TDMI processor in Verilog
1 64
ARM_Cortex-M3
 该项目依据全国大学生集成电路创新创业大赛“ARM杯”赛题要求，在FPGA上搭建Cortex-M3软核、图像协处理器，并通过OV5640摄像头采集车牌图像，实现对车牌的识别与结果显示。项目基于Altera DE1 FPGA搭载Cortex-M3软核，依据AHB-Lite总线协议，将LCD1602、RAM、图像协处理器等外设挂载至Cortex-M3。视频采集端，设计写FiFo模块、SDRAM存储与输出、读FiFo模块、灰度处理模块、二值化、VGA显示等模块。最终将400位宽的结果数据（对应20张车牌）存储在RAM中，输出至AHB总线，由Cortex-M3调用并显示识别结果。
1 59
MIPS
 A classic 5-stage pipeline MIPS 32-bit processor, including a 2-bit branch predictor, a branch prediction buffer and a direct-mapped cache.
1 45
ARM9-compatible-soft-CPU-core
 This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your FPGA design as one submodule, if you master the interface of this .v file. This IP core is very compact. It is one .v file and has only less 1800 lines.
1 29
airisc_core_complex
 Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional periperals.
1 6
LimeSDR-Mini-v2_GW
 LimeSDR Mini v2 gateware project
1 2
fpga11
 FPGA PDP-11 for the PiDP-11 panel
1 1
SPI-Register-Access-Controller
 Here you can find the RTL for a SPI+Register bank controller which can be used to test stand-alone Analog/Digital IP

Popular Verilog Topics

#Fpga #Verilog #Verilator #wishbone #wishbone-bus #Asic #risc-v #Gplv3 #Cpu #ov7670 #system-on-chip #icestorm #Rv32i #Camera #Riscv #zipcpu #Linux #fpga-soc #Hdl #eda #verilog-components #Xilinx #pipelined #ulx3s #altera

Latest Mentions

Latest mentioned Verilog repos
Stars Project
54 wokwi-verilog-gds-test
994 corundum
1,302 verilog-ethernet
4 adi_adrv9371_zc706
1,384 hw
299 vroom
2,209 picorv32
74 riscv
323 wb2axip
97 dspfilters
1 caf_verilog
2 fpga11
522 microwatt
9 a2o
269 apicula
110 Minimig-AGA_MiSTer
1 SPI-Register-Access-Controller
2 alpha68k
106 NeoGeo_MiSTer
161 ao486_MiSTer

Latest Discoveries

Latest discovered Verilog repos
Stars Project
1,384 hw
74 riscv
9 a2o
1 caf_verilog
2 fpga11
4 adi_adrv9371_zc706
1 SPI-Register-Access-Controller
2 alpha68k
59 MIPS
29 airisc_core_complex
64 ARM_Cortex-M3
67 ARM-LEGv8
45 ARM9-compatible-soft-CPU-core
65 ARM7
212 SCALE-MAMBA
6 LimeSDR-Mini-v2_GW
14 GottaGoFastRAM2000
8 hdl_library
16 wbfmtx
0 zx

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