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Top 4 Verilog Rtl Projects
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Project mention: Opensouce RISC-V CPU core implemented in Verilog from scratch in one night | news.ycombinator.com | 2025-03-16
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InfluxDB
InfluxDB – Built for High-Performance Time Series Workloads. InfluxDB 3 OSS is now GA. Transform, enrich, and act on time series data directly in the database. Automate critical tasks and eliminate the need to move data externally. Download now.
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OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Project mention: Apple will soon receive 'made in America' chips from TSMC's Arizona fab | news.ycombinator.com | 2025-01-14 -
OpenROAD-flow-scripts
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
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FPGA-SDcard-Reader
An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器,可以从FAT16或FAT32格式的SD卡中读取文件。
NOTE:
The open source projects on this list are ordered by number of github stars.
The number of mentions indicates repo mentiontions in the last 12 Months or
since we started tracking (Dec 2020).
Verilog Rtl discussion
Verilog Rtl related posts
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Chisel: A Modern Hardware Design Language
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Simple skid buffer implementation
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VLSI Tools
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Any recommendations for an RTL "standard library"?
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Share some github FPGA projects (bonus if they include C++, Python, or other files)
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A note from our sponsor - SaaSHub
www.saashub.com | 17 Jun 2025
Index
What are some of the best open-source Rtl projects in Verilog? This list will help you:
# | Project | Stars |
---|---|---|
1 | darkriscv | 2,344 |
2 | OpenROAD | 1,999 |
3 | OpenROAD-flow-scripts | 439 |
4 | FPGA-SDcard-Reader | 302 |