Trending Verilog Projects

This page lists the top trending Verilog projects based on the growth of GitHub stars.
It is updated once every day. The last update was on 8 Aug 2022.
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Top 19 Trending Verilog Projects

  • openlane

    OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

  • CFU-Playground

    Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online workshop: https://google.github.io/CFU-Playground/ For reference docs, see the link below.

  • f4pga-examples

    Example designs showing different ways to use F4PGA toolchains.

  • openc910

    OpenXuantie - OpenC910 Core

  • apio

    :seedling: Open source ecosystem for open FPGA boards

  • apicula

    Project Apicula 🐝: bitstream documentation for Gowin FPGAs

  • ao486_MiSTer

    ao486 port for MiSTer

  • livehd

    Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation

  • corundum

    Open source FPGA-based NIC and platform for in-network compute

  • Genesis_MiSTer

    Sega Genesis for MiSTer

  • riscv-formal

    RISC-V Formal Verification Framework

  • uhd

    The USRP™ Hardware Driver Repository

  • vortex

  • openc906

    OpenXuantie - OpenC906 Core

  • picorv32

    PicoRV32 - A Size-Optimized RISC-V CPU

  • basejump_stl

    BaseJump STL: A Standard Template Library for SystemVerilog

  • open-register-design-tool

    Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

  • hdl

    HDL libraries and projects

ABOUT: The growth percentage is calculated as the increase in the number of stars compared to the previous month. We list only projects that have at least 500 stars and a GitHub organization logo set.

Index

What are some of the trending open-source Verilog projects? This list will help you:

Project Growth
1 openlane 5.6%
2 CFU-Playground 4.9%
3 f4pga-examples 4.9%
4 openc910 4.0%
5 apio 3.3%
6 apicula 3.0%
7 ao486_MiSTer 2.6%
8 livehd 2.6%
9 corundum 2.3%
10 Minimig-AGA_MiSTer 1.9%
11 Genesis_MiSTer 1.9%
12 riscv-formal 1.9%
13 uhd 1.9%
14 vortex 1.8%
15 openc906 1.7%
16 picorv32 1.6%
17 basejump_stl 1.4%
18 open-register-design-tool 1.3%
19 hdl 1.1%