Verilog Tcl

Open-source Verilog projects categorized as Tcl
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Topics: #CPP #Verilog #Rtl #eda #openroad
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Verilog Tcl Projects

  • OpenROAD

    OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

    Project mention: OpenROAD | news.ycombinator.com | 2023-09-04

  • InfluxDB

    Collect and Analyze Billions of Data Points in Real Time. Manage all types of time series data in a single, purpose-built database. Run at any scale in any environment in the cloud, on-premises, or at the edge.

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020). The latest post mention was on 2023-09-04.

Index

Project Stars
1 OpenROAD 1,054

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