Verilog Core

Open-source Verilog projects categorized as Core

Topics: #risc-v #Fpga #Verilog #Cpu #Riscv

Access the most powerful time series database as a service

Ingest, store, & analyze all types of time series data in a fully-managed, purpose-built database. Keep data forever with low-cost storage and superior data compression.

www.influxdata.com

Verilog Core Projects

darkriscv

0 1,630 2.8 Verilog

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
InfluxDB

www.influxdata.com
sponsored

Access the most powerful time series database as a service. Ingest, store, & analyze all types of time series data in a fully-managed, purpose-built database. Keep data forever with low-cost storage and superior data compression.

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

Index

	Project	Stars
1	darkriscv	1,630

Verilog Core

Verilog Core Projects

darkriscv

InfluxDB

Index