darkriscv
meta-riscv
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darkriscv | meta-riscv | |
---|---|---|
3 | 3 | |
1,626 | 275 | |
1.0% | 2.2% | |
5.2 | 6.8 | |
5 months ago | about 2 months ago | |
Verilog | BitBake | |
BSD 3-clause "New" or "Revised" License | GNU General Public License v3.0 or later |
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Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
darkriscv
- Are there any dual-GBE, PoE-capable SBCs?
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Chinese Academy of Sciences releases "Xiangshan", a high performance open source RISC-V processor that runs Linux
Just found https://github.com/darklife/darkriscv whose (incomplete) core is surprisingly short. Which means you won't have to learn a lot. You can run it in simulator or on one of the listed fpga boards.
meta-riscv
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New to embedded
There does exist a Yocto recipe for RISC-V that claims to support both 32 and 64-bit. I haven't used it myself, but your best bet may be spin up a custom Yocto/OE based distro. You can find the source and documentation here: https://github.com/riscv/meta-riscv
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Pine64 August update: RISC and reward
Great news !. We have a yocto port for JH7110 here https://github.com/riscv/meta-riscv/blob/master/conf/machine/visionfive.conf, I will be happy to add a machine conf for pine64, It should be easy enough to start from above as template.
What are some alternatives?
biriscv - 32-bit Superscalar RISC-V CPU
XiangShan - Open-source high-performance RISC-V processor
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
Cores-VeeR-EH1 - VeeR EH1 core
riscv - RISC-V CPU Core (RV32IM)
friscv - RISCV CPU implementation in SystemVerilog
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
meta-balena - A collection of Yocto layers used to build balenaOS images
scr1 - SCR1 is a high-quality open-source RISC-V MCU core in Verilog
open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
ready-set-yocto - A short, unofficial guide on getting started with Yocto using a Raspberry Pi
ice-chips-verilog - IceChips is a library of all common discrete logic devices in Verilog