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Top 10 Verilog risc-v Projects
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Project mention: Flexible RISC-V Processor: Could Cost Less Than a Dollar | news.ycombinator.com | 2024-09-29
For those who don't know SERV is a serial RISC-V architecture - really small, fits in a Tiny Tapeout tile
https://github.com/olofk/serv
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Project mention: Box64 and RISC-V in 2024: What It Takes to Run the Witcher 3 on RISC-V | news.ycombinator.com | 2024-08-26
None of this is new. None of it.
In fact, bitfield extract is such an obvious oversight that it is my favourite example of how idiotic the RISCV ISA is (#2 is lack of sane addressing modes).
Some of the better RISCV designs, in fact, implement a custom instr to do this, eg: BEXTM in Hazard3: https://github.com/Wren6991/Hazard3/blob/stable/doc/hazard3....
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Project mention: The 8-Bit Era: Eight Iconic Processor Designs – By Babbage | news.ycombinator.com | 2023-12-04
> Or maybe there's a RV32I community for writing retro style games, with some simple graphics support?
Wow, https://github.com/dan-rodrigues/icestation-32 looks cool. Sorry for the comment spam. :)
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airisc_core_complex
Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.
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Project mention: SoC RISC-V: An ASIC Implementation of the FEMTORV32 | news.ycombinator.com | 2023-12-20
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Verilog risc-v discussion
Verilog risc-v related posts
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Flexible RISC-V Processor: Could Cost Less Than a Dollar
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Wren6991/Hazard3: 3-stage RV32IMACZb* processor with debug
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Hazard3
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Raspberry Pi Pico 2, our new $5 microcontroller board, on sale now
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SERV – The SErial RISC-V CPU
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RISC-V support in Android just got a big setback
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SERV – The SErial RISC-V CPU
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A note from our sponsor - SaaSHub
www.saashub.com | 9 Oct 2024
Index
What are some of the best open-source risc-v projects in Verilog? This list will help you:
Project | Stars | |
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1 | darkriscv | 2,098 |
2 | serv | 1,403 |
3 | riscv | 1,197 |
4 | biriscv | 838 |
5 | Hazard3 | 660 |
6 | icestation-32 | 152 |
7 | airisc_core_complex | 81 |
8 | RISC-V | 61 |
9 | ITA-CORES | 39 |
10 | fpga_riscv_cpu | 10 |