Our great sponsors
|5 months ago||5 days ago|
|BSD 3-clause "New" or "Revised" License||MIT License|
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Are there any dual-GBE, PoE-capable SBCs?
2 projects | reddit.com/r/linuxhardware | 20 Aug 2021
Chinese Academy of Sciences releases "Xiangshan", a high performance open source RISC-V processor that runs Linux
5 projects | reddit.com/r/linux | 26 Jun 2021
Just found https://github.com/darklife/darkriscv whose (incomplete) core is surprisingly short. Which means you won't have to learn a lot. You can run it in simulator or on one of the listed fpga boards.
Need help learning how to use risc-v toolchain
2 projects | reddit.com/r/FPGA | 22 Jun 2021
What are some alternatives?
biriscv - 32-bit Superscalar RISC-V CPU
XiangShan - Open-source high-performance RISC-V processor
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
Cores-VeeR-EH1 - VeeR EH1 core
riscv - RISC-V CPU Core (RV32IM)
scr1 - SCR1 is a high-quality open-source RISC-V MCU core in Verilog
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
meta-riscv - OpenEmbedded/Yocto layer for RISC-V Architecture
ravenoc - RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications
open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
ice-chips-verilog - IceChips is a library of all common discrete logic devices in Verilog