riscv

RISC-V CPU Core (RV32IM) (by ultraembedded)
Review risc-v Cpu Verilog Fpga Verilator Rv32im Rv32i riscv-linux pipeline-processor Asic Verification
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riscv

  1. zipcpu

    13 riscv VS zipcpu

    A small, light weight, RISC CPU soft core

  2. SaaSHub

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  3. biriscv

    6 riscv VS biriscv

    32-bit Superscalar RISC-V CPU

  4. spam-1

    1 riscv VS spam-1

    Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my research and learning. See also the Hackaday.IO project. https://hackaday.io/project/166922-spam-1-8-bit-cpu

  5. psram-tang-nano-9k

    7 riscv VS psram-tang-nano-9k

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  6. vgasim

    11 riscv VS vgasim

    A Video display simulator

  7. uhd

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  8. livehd

    1 riscv VS livehd

    Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation

  9. darkriscv

    4 riscv VS darkriscv

    opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

  10. kianRiscV

    1 riscv VS kianRiscV

    RISC-V XV6/Linux SoC, marchID: 0x2b, 0x34

  11. openlane

    13 riscv VS openlane

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NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a better riscv alternative or higher similarity.
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Stats

Basic riscv repo stats
2
1,662
1.8
over 4 years ago

ultraembedded/riscv is an open source project licensed under BSD 3-clause "New" or "Revised" License which is an OSI approved license.

The primary programming language of riscv is Verilog.

Popular Comparisons

  1. riscv VS zipcpu
  2. riscv VS biriscv
  3. riscv VS spam-1
  4. riscv VS psram-tang-nano-9k
  5. riscv VS vgasim
  6. riscv VS uhd
  7. riscv VS livehd
  8. riscv VS darkriscv
  9. riscv VS kianRiscV
  10. riscv VS openlane

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