Openlane Alternatives

openlane reviews and mentions

• [D][P] Represent Analog Circuits as Graphs
  3 projects | /r/MachineLearning | 15 Apr 2023

  I would suggest Verilog-to-routing as the best open source tool ive used that deals with abstract circuit representations on an FPGA or similar architecture. but tools like Align and Magical both accept circuit inputs as netlists and have to represent them internally for generating layout so might be easier to understand their approach depending on your familiarity with analog circuits. One more option is to look up OpenLane flow, its more an amalgamation of lots of tools but definitely also represents circuits as a graph for manipulation later on.

• how small team survive from cadence cost
  1 project | /r/chipdesign | 15 Jan 2023

  There are open source alternatives. https://github.com/The-OpenROAD-Project/OpenLane

• VLSI Tools
  6 projects | /r/chipdesign | 14 Dec 2022

  OpenLane

• Compiling Code into Silicon
  10 projects | news.ycombinator.com | 7 Dec 2021
• Kickstarting IC design
  2 projects | /r/chipdesign | 3 Dec 2021

  And, there is a project called 'The OpenROAD Project' which has created an open-source framework for digital back-end design/physical design. https://github.com/The-OpenROAD-Project/OpenLane

• How are modern processors and their architecture designed?
  4 projects | /r/ECE | 28 Sep 2021

  For "how the architecture is brought to silicon": Look at OpenLane. It's a complete Verilog to GDS flow, all open source and already used for some tape-outs. https://github.com/The-OpenROAD-Project/OpenLane

• Project Ideas for Uni
  2 projects | /r/FPGA | 23 Aug 2021

  Maybe you can do something that can also go to an ASIC. Take a look at openlane flow, you don't need to do the backend since it is mostly script based and you can even send it to next Skywater submission. The major problem is that you currently don't have sram access so you need to create rams from logic if you need to.

• ASIC design post layout for padding.
  1 project | /r/chipdesign | 15 Aug 2021

  I am not sure if you can do padding with this but dropping this down in case you haven't heard it: https://github.com/The-OpenROAD-Project/OpenLane

• Resources for a physical design engineer
  1 project | /r/chipdesign | 20 Jul 2021

  Specifically openlane (https://github.com/The-OpenROAD-Project/OpenLane is a great way to start, although it's very painful trying to do complex designs. However, they're pretty helpful answering questions on Gitter

• Intro into chip design
  1 project | /r/chipdesign | 7 May 2021

  https://github.com/efabless/openlane The README is very helpful

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