Kiwi-Project-Samples
darkriscv
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| Kiwi-Project-Samples | darkriscv | |
|---|---|---|
| 4 | 3 | |
| 4 | 1,892 | |
| - | 3.3% | |
| 0.0 | 6.3 | |
| over 2 years ago | 12 days ago | |
| Verilog | Verilog | |
| - | BSD 3-clause "New" or "Revised" License |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Kiwi-Project-Samples
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What's the most efficient way to wire up a large logic gate circuit in the real world?
I've been working on an FPGA development board for beginners (https://www.crowdsupply.com/ulab/ulab-kiwi), but I have not started selling it yet.
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Have your personal projects gone commercial?
Here's a link to the Crowd Supply pre-launch page if anyone's interested in checking it out :) https://www.crowdsupply.com/ulab/ulab-kiwi
- µLab Kiwi and Kiwi Lite FPGA+ESP32 Development boards on Crowd Supply
darkriscv
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As an undergrad in my 3rd year with what feels like very little basics down, is implementing a basic RISC-V 5-stage pipelined processor on an FPGA too complex a project for an undergrad student?
This guy here has designed his 2 stage RISC-V in just one right: https://github.com/darklife/darkriscv.
- Are there any dual-GBE, PoE-capable SBCs?
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Chinese Academy of Sciences releases "Xiangshan", a high performance open source RISC-V processor that runs Linux
Just found https://github.com/darklife/darkriscv whose (incomplete) core is surprisingly short. Which means you won't have to learn a lot. You can run it in simulator or on one of the listed fpga boards.
What are some alternatives?
Haasoscope - Docs, design, firmware, and software for the Haasoscope
biriscv - 32-bit Superscalar RISC-V CPU
uLab-system-builder - This program generates project settings (such as pin assignments) and basic Verilog code for the μLab Kiwi FPGA development board
XiangShan - Open-source high-performance RISC-V processor
riscv - RISC-V CPU Core (RV32IM)
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
Cores-VeeR-EH1 - VeeR EH1 core
friscv - RISCV CPU implementation in SystemVerilog
meta-riscv - OpenEmbedded/Yocto layer for RISC-V Architecture
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
ice-chips-verilog - IceChips is a library of all common discrete logic devices in Verilog