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Mentions
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Stars | Project | Description |
|---|---|---|---|
| 2 | 241 | Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms. |
Popular SystemVerilog Topics
Latest Mentions
Latest mentioned SystemVerilog repos
| Stars | Project |
|---|---|
| 241 | Coyote |
| 6 | uvm_tb_template |
| 6 | uvm_tb_templates |
| 2,735 | opentitan |
| 1,487 | ibex |
| 7 | openchips |
| 134 | tiny-tpu |
| 666 | lets-prove-leftpad |
| 197 | SoomRV |
| 1 | ableC-template-algebraic-data-types |
| 7,968 | tiny-gpu |
| 17 | ebrick-demo |
| 37 | sonata-system |
| 18 | GettingVerilatorStartedWithUVM |
| 1 | PurdNyUart |
| 89 | FazyRV |
| 1,122 | hdmi |
| 86 | sargantana |
| 2 | petalinux_notes |
| 6 | RTLDesignSherpa |
Latest Discoveries
Latest discovered SystemVerilog repos
| Stars | Project |
|---|---|
| 6 | uvm_tb_templates |
| 6 | uvm_tb_template |
| 7 | openchips |
| 134 | tiny-tpu |
| 111 | open-nic-shell |
| 197 | SoomRV |
| 1 | ableC-template-algebraic-data-types |
| 7,968 | tiny-gpu |
| 17 | ebrick-demo |
| 37 | sonata-system |
| 18 | GettingVerilatorStartedWithUVM |
| 89 | FazyRV |
| 86 | sargantana |
| 2 | petalinux_notes |
| 6 | RTLDesignSherpa |
| 6 | ulm-on-ice |
| 3 | NeuralNetworkOnFPGA |
| 160 | Saturn_MiSTer |
| 11 | verilog-ts-mode |
| 98 | cheriot-ibex |
Recently updated posts
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RISC-V Processor Design – Lec 6 – EXU and Co-Simulation
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Introducing UVM TB Templates
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TKey – Security for the New World
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OpenTitan: Open-source silicon root of trust
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Open Source FPGA Expansion Card for the Apple II