Trending SystemVerilog Projects

This page lists the top trending SystemVerilog projects based on the growth of GitHub stars.
It is updated once every day. The last update was on 14 Jul 2025.
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Top 44 Trending SystemVerilog Projects

  1. starshipraider

    Open hardware test equipment

  2. projf-explore

    Project F brings FPGAs to life with exciting open-source designs you can build on.

  3. cheriot-ibex

    cheriot-ibex is a RTL implementation of CHERIoT ISA based on LowRISC's Ibex core.

  4. riscv-simple-sv

    A simple RISC V core for teaching

  5. uvmprimer

    Contains the code examples from The UVM Primer Book sorted by chapters.

  6. Cores-VeeR-EL2

    VeeR EL2 Core

  7. cvw

    CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.

  8. VeriGPU

    OpenSource GPU, in Verilog, loosely based on RISC-V ISA

  9. tiny-tpu

    A minimal Tensor Processing Unit (TPU) inspired by Google's TPUv1.

  10. Coyote

    Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous platforms. (by fpgasystems)

  11. Cores-VeeR-EH2

  12. cvfpu

    Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

  13. axi

    AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

  14. AHB2

    AMBA AHB 2.0 VIP in SystemVerilog UVM

  15. ravenoc

    RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications

  16. basejump_stl

    BaseJump STL: A Standard Template Library for SystemVerilog

  17. tiny-gpu

    A minimal GPU design in Verilog to learn how GPUs work from the ground up

  18. ibex

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

  19. kria-vitis-platforms

    Kria Vitis platforms and overlays

  20. opentitan

    OpenTitan: Open source silicon root of trust

  21. bsg_manycore

    Tile based architecture designed for computing efficiency, scalability and generality

  22. basics-graphics-music

    FPGA exercise for beginners

  23. black-parrot

    A Linux-capable RISC-V multicore for and by the world

  24. pulpissimo

    This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

  25. cv32e40p

    CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

  26. NES_MiSTer

  27. NiteFury-and-LiteFury

    Public repository for Litefury & Nitefury

  28. rsd

    RSD: RISC-V Out-of-Order Superscalar Processor

  29. openfpga-NES

    NES for the Analogue Pocket

  30. scr1

    SCR1 is a high-quality open-source RISC-V MCU core in Verilog

  31. SoomRV

    A simple superscalar out-of-order RISC-V microprocessor

  32. edn8-pro-pub

    EverDrive N8 PRO dev sources

  33. eurorack-pmod

    A eurorack-friendly audio frontend compatible with many FPGA boards, based on the AK4619VN audio CODEC.

  34. lets-prove-leftpad

    Proving leftpad correct two-dozen different ways

  35. aws-fpga

    Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

  36. hdmi

    Send video/audio over HDMI on an FPGA

  37. MinecraftHDL

    A Verilog synthesis flow for Minecraft redstone circuits

  38. analogue-pocket-utils

    Collection of IP and information on how to develop for openFPGA and Analogue Pocket

  39. open-nic-shell

    AMD OpenNIC Shell includes the HDL source files

  40. wav-lpddr-hw

    Wavious DDR (WDDR) Physical interface (PHY) Hardware

  41. lowrisc-chip

    The root repo for lowRISC project and FPGA demos.

  42. Cores-VeeR-EH1

    VeeR EH1 core

  43. mega-ed-pub

    Mega EverDrive dev sources

  44. fpga-tamagotchi

    Tamagotchi P1 for Analogue Pocket and MiSTer

ABOUT: The growth percentage is calculated as the increase in the number of stars compared to the previous month. We list only projects that have at least 500 stars and a GitHub organization logo set.

Index

What are some of the trending open-source SystemVerilog projects? This list will help you:

Project Growth
1 starshipraider 16.8%
2 projf-explore 7.6%
3 cheriot-ibex 6.3%
4 riscv-simple-sv 5.8%
5 uvmprimer 5.3%
6 Cores-VeeR-EL2 4.5%
7 cvw 4.3%
8 VeriGPU 4.2%
9 tiny-tpu 3.7%
10 Coyote 3.0%
11 Cores-VeeR-EH2 2.9%
12 cvfpu 2.7%
13 axi 2.6%
14 AHB2 2.6%
15 ravenoc 2.4%
16 basejump_stl 2.2%
17 tiny-gpu 2.1%
18 ibex 2.0%
19 kria-vitis-platforms 1.9%
20 opentitan 1.9%
21 bsg_manycore 1.9%
22 basics-graphics-music 1.7%
23 black-parrot 1.5%
24 pulpissimo 1.4%
25 cv32e40p 1.2%
26 NES_MiSTer 1.1%
27 NiteFury-and-LiteFury 1.0%
28 rsd 1.0%
29 openfpga-NES 1.0%
30 scr1 1.0%
31 SoomRV 1.0%
32 edn8-pro-pub 1.0%
33 eurorack-pmod 0.9%
34 lets-prove-leftpad 0.9%
35 aws-fpga 0.7%
36 hdmi 0.0%
37 MinecraftHDL 0.0%
38 analogue-pocket-utils 0.0%
39 open-nic-shell 0.0%
40 wav-lpddr-hw 0.0%
41 lowrisc-chip 0.0%
42 Cores-VeeR-EH1 0.0%
43 mega-ed-pub 0.0%
44 fpga-tamagotchi 0.0%