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Opentitan Alternatives
Similar projects and alternatives to opentitan
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Onboard AI
Learn any GitHub repo in 59 seconds. Onboard AI learns any GitHub repo in minutes and lets you chat with it to locate functionality, understand different parts, and generate new code. Use it for free at www.getonboard.dev.
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skywater-pdk
Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
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openlane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
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InfluxDB
Collect and Analyze Billions of Data Points in Real Time. Manage all types of time series data in a single, purpose-built database. Run at any scale in any environment in the cloud, on-premises, or at the edge.
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axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
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basejump_stl
BaseJump STL: A Standard Template Library for SystemVerilog
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satcat5
SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
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SmartPGP
SmartPGP is a JavaCard implementation of the OpenPGP card specifications
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SaaSHub
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opentitan reviews and mentions
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Ask HN: Who is hiring? (July 2023)
lowRISC https://lowrisc.org | Non-profit | Cambridge, UK | Zurich, Switzerland | Design Verification Engineers | Infrastructure Engineer | HYBRID | Full time
lowRISC's mission is to bring open source silicon to the hardware world and see it shipping in volume in commercial applications. We want to see open source silicon occupy a similar position to open source software (e.g. look at Linux, it's the default choice in many applications, we'd like open source silicon to be used for similar foundational technologies in the hardware world).
Our major project focus is OpenTitan: https://github.com/lowRISC/opentitan it’s a silicon root of trust being built and funded by a collaboration of major companies, such as Google, Western Digital, Seagate, Winbond and Rivos amongst others. lowRISC stewards the project as well as performing a significant proportion of the engineering work.
We’ve just announced the RTL freeze for the first OpenTitan tapeout, a discrete chip, named Earl Grey: https://lowrisc.org/blog/2023/06/opentitans-rtl-freeze-lever...
We’re looking for verification and infrastructure engineers to join us. We work in System Verilog and use UVM, though plan to expand our use of formal verification. We’re also keen to explore new innovative ways to verify designs.
A key responsibility for lowRISC is maintaining the CI and regression infrastructure for OpenTitan. This is a complex system running many different tools across different machines (both cloud and on-site) and involves FPGAs and custom hardware. We use ansible and terraform to manage it all. We’re seeking an infrastructure engineer to maintain and scale the system as well as architect and build new facets of it.
lowRISC is headquartered in Cambridge, UK and we have an office in Zürich, Switzerland. We utilize a hybrid working model.
We offer competitive salaries (see job ads for ranges) and a generous pension (12.5% employer contribution in the UK), you can find our individual job postings here: https://lowrisc.applytojob.com/apply/
Feel free to email me at [email protected] if you’ve got any questions.
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Looking to work in Open Source Silicon and RISC-V? lowRISC is hiring DV and infrastructure engineers
Our major project focus is OpenTitan: https://github.com/lowRISC/opentitan it’s a silicon root of trust being built and funded by a collaboration of major companies, such as Google, Western Digital, Seagate, Winbond and Rivos amongst others. lowRISC stewards the project as well as performing a significant proportion of the engineering work.
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Towards a More Open Secure Element Chip
Interesting to see more potential entrants into this space. I work on OpenTitan https://opentitan.org/ which I believe will do much (indeed maybe everything) of what Cramium and Bunnie are aiming for (of course being a stealth startup hard to know what their plans actually are). We're at an advanced stage of development and being open you can take a look at our work right now https://github.com/lowRISC/OpenTitan our nightly regression dashboards demonstrate the project's maturity https://reports.opentitan.org/hw/top_earlgrey/dv/latest/repo... and https://reports.opentitan.org/hw/top_earlgrey/dv/summary/lat...
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Google, Western Digital, Seagate quietly an open source root of trust
We've changed the URL to that from https://github.com/lowRISC/opentitan,
and the title from
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Making open source hardware design a reality
Whilst open source hardware work goes back a fair way, I feel we're really at a turning point where it can become a serious force within the hardware world (think late 80s/early 90s in software terms, Linux and GCC emerging and beginning to find their feet). There's lots of interesting developments in tooling plus significant open hardware projects on-going.
I shall take the opportunity to plug OpenTitan: https://github.com/lowRISC/opentitan
It's an open source root of trust being developed collaboratively by multiple companies such as lowRISC (who I work for), Google, Western Digital and Seagate amongst others. We've been rather quiet on the PR front but there's a lot of engineering work happening and other exciting things we can't yet make public.
Whilst there's some things we have to keep closed (generally relating to ASIC design kits and things like Flash and memory IP) the vast majority of the RTL, documentation and software is open. Plus we're doing development in the open, the public repo is our live development repo. We're not developing it in private then just opening the end product.
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lowRISC stopped working on their SoC in 2018 ;-(
Whilst the 64-bit SoC project isn't being actively developed we are working hard on OpenTitan (https://opentitan.org/, https://github.com/lowRISC/opentitan) which we hope will become the first large scale deployment of significant open source silicon IP.
- Compiling Code into Silicon
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Any recommendations for an RTL "standard library"?
Opentitan has a library of well-written system verilog modules here. It's not trying to be a collection for everything one might need, but the superb quality of the code makes it worth to go have a look if there's a chance they may have what you're looking for.
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What should a modern IP library look like?
https://github.com/lowRISC/opentitan - OpenTitan an Open Source root of Trust
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www.saashub.com | 28 Nov 2023
Stats
lowRISC/opentitan is an open source project licensed under Apache License 2.0 which is an OSI approved license.
The primary programming language of opentitan is SystemVerilog.