Black-parrot Alternatives

black-parrot reviews and mentions

• Verilator - Do I need to maintain two testbench suits?
  2 projects | /r/FPGA | 10 Jul 2023

  Another option is to have a single verilog testbench with clock and reset ports driven by verilator:https://github.com/black-parrot/black-parrot/blob/master/bp_top/test/tb/bp_tethered/test_bp.cpphttps://github.com/black-parrot/black-parrot/blob/master/bp_top/test/tb/bp_tethered/testbench.sv

• Which FPGA for getting into RISC-V?
  2 projects | /r/RISCV | 1 Dec 2022

  It depends drastically on the core and configuration, but a default configured BlackParrot: https://github.com/black-parrot/black-parrot takes up about 50% of Z2 resources without any FPGA-specific tweaks.

• ASIC roundup of open source RISC-V CPU cores
  2 projects | /r/RISCV | 18 Jan 2022

  Whoops, read the blog “no sram”. Would love to get my project https://github.com/black-parrot/black-parrot/tree/master on there. Do you have a sense for how many instances your flow could support? We use hardened srams for our caches which are minimally 8kB each at the moment.

• A note from our sponsor - Mergify
  blog.mergify.com | 29 Sep 2023

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