SystemVerilog Fpga

Open-source SystemVerilog projects categorized as Fpga

Top 23 SystemVerilog Fpga Projects

  • hdmi

    Send video/audio over HDMI on an FPGA

    Project mention: HDMI Forum Rejects Open-Source HDMI 2.1 Driver Support Sought by AMD | news.ycombinator.com | 2024-02-28

    Relevant caveat from its readme: https://github.com/hdl-util/hdmi?tab=readme-ov-file#hdmi-ado...

  • axi

    AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

  • Cores-VeeR-EH1

    VeeR EH1 core

  • projf-explore

    Project F brings FPGAs to life with exciting open-source designs you can build on.

  • nestang

    NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards

  • Cores-VeeR-EL2

    VeeR EL2 Core

  • openfpga-NES

    NES for the Analogue Pocket

  • WorkOS

    The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.

  • Coyote

    Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms. (by fpgasystems)

  • eurorack-pmod

    Hardware and gateware for getting started in FPGA-based audio synthesis with open source tools.

  • analogue-pocket-utils

    Collection of IP and information on how to develop for openFPGA and Analogue Pocket

    Project mention: FPGAs and the Renaissance of Retro Hardware | news.ycombinator.com | 2023-11-27

    I _technically_ had prior knowledge as a computer architecture class had us stick some premade pieces together to create a CPU we designed, but I personally wrote no Verilog, and it was a small subset of the class.

    I don't have much documentation for getting started with HDLs (Verilog, VHDL, etc), but I have tried to document my process as much as possible. I have primarily developed for the Analogue Pocket, so my documentation is themed towards that device, but there's IP (code modules) and wiki entries that would be useful for everyone: https://github.com/agg23/analogue-pocket-utils

    I had previously written a cycle accurate NES emulator, so I was familiar with hardware techniques, but not what they look like in circuits. The first core I wrote was a schematic accurate Pong implementation. This was both good and bad because it's very simple and has no CPU (and thus no code), but it also makes it very hard to tell what is going on. I went from there to doing a lot of ports (NES, SNES, PCE, and a few more), and after that I worked on my own cores (Tamagotchi, Game and Watch). Tamagotchi I took a very typical software approach where I wrote massive amounts of unit tests and wrote against those tests. While this is what real hardware developers do, I found it to be a huge waste of time when you're working by yourself on a small project.

    I, and a few others, are very willing to help people learn (though I'm still really a noob). If you want to play around in this space, let me know and I'll try to help you with what you need.

  • cheshire

    A minimal Linux-capable 64-bit RISC-V SoC built around CVA6 (by pulp-platform)

    Project mention: Cpu project | /r/RISCV | 2023-05-08

    If you want to see the difference in scale you may want to compare the Cheshire SoC (Linux capable) here

  • BrianHG-DDR3-Controller

    DDR3 Controller v1.60, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.

  • FazyRV

    A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.

    Project mention: FazyRV – A Scalable RISC-V Core | news.ycombinator.com | 2024-03-01
  • FPGA-Video-Processing

    Realtime video processing w/ Gaussian + Sobel Filters targeting Artix-7 FPGA

  • Tiny_But_Mighty_I2C_Master_Verilog

    I2C Master Verilog module

  • libsv

    An open source, parameterized SystemVerilog digital hardware IP library

  • ApogeoRV

    A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.

  • mips_cpu

    Single Cycle 32 bit MIPS

  • rp32

    RISC-V processor with CPI=1 (every single instruction executed in a single clock cycle).

    Project mention: How to design a more elegant and simple instraction decoder | /r/RISCV | 2023-05-24

    Here is my decoder: https://github.com/jeras/rp32/blob/master/hdl/rtl/riscv/riscv_isa_i_pkg.sv

  • fpga_screensaver

    This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board.

    Project mention: Best fpga for begginers | /r/FPGA | 2023-06-09

    This is a simple VGA project I did for the Tang Nano: https://github.com/sifferman/fpga_screensaver

  • simple10GbaseR

    FPGA low latency 10GBASE-R PCS

  • ulm-on-ice

    ULM (Ulm Lecture Machine) on ice40

    Project mention: Building your own computer with an FPGA | /r/FPGA | 2023-10-22

    I used a Lattice ice40 FPGA (e.g. icebreaker) FPGA to implement a simple RISC microprocessor. For the hardware description I used SystemVerilog and an open source toolchain. The source code is on GitHub.

  • basys3_fpga_sandbox

    Learning the basics of Systemverilog, testbench and more.

  • SaaSHub

    SaaSHub - Software Alternatives and Reviews. SaaSHub helps you find the best software and product alternatives

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020). The latest post mention was on 2024-03-01.

SystemVerilog Fpga related posts

Index

What are some of the best open-source Fpga projects in SystemVerilog? This list will help you:

Project Stars
1 hdmi 1,002
2 axi 920
3 Cores-VeeR-EH1 771
4 projf-explore 498
5 nestang 291
6 Cores-VeeR-EL2 222
7 openfpga-NES 183
8 Coyote 176
9 eurorack-pmod 158
10 analogue-pocket-utils 105
11 cheshire 99
12 BrianHG-DDR3-Controller 60
13 FazyRV 55
14 FPGA-Video-Processing 20
15 Tiny_But_Mighty_I2C_Master_Verilog 19
16 libsv 19
17 ApogeoRV 13
18 mips_cpu 10
19 rp32 8
20 fpga_screensaver 5
21 simple10GbaseR 4
22 ulm-on-ice 2
23 basys3_fpga_sandbox 0
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SaaSHub helps you find the best software and product alternatives
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