SystemVerilog hardware-designs

Open-source SystemVerilog projects categorized as hardware-designs
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Topics: Verilog IP risc-v Asic GPU
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SystemVerilog hardware-design Projects

  • VeriGPU

    OpenSource GPU, in Verilog, loosely based on RISC-V ISA

  • libsv

    An open source, parameterized SystemVerilog digital hardware IP library

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

SystemVerilog hardware-designs related posts

Index

Project Stars
1 VeriGPU 484
2 libsv 19

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