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Top 9 SystemVerilog Riscv Projects
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HaDes-V
HaDes-V is an Open Educational Resource for learning microcontroller design. It guides you through creating a pipelined 32-bit RISC-V processor using SystemVerilog and FPGA tools. Developed by TU Graz's EAS Group, this resource combines hands-on exercises in hardware/software co-design with practical implementation on the Basys3 FPGA board.
https://github.com/tscheipel/HaDes-V
Every electrical engineer is going to know how to design a RISC-V chip. But you could also be an intelligent garbage man and design a RISC-V chip in your spare time using only open source materials. You can even tape it out.
https://tinytapeout.com/
"But that is only a 32 bit microcontroller!", you might say. Sure. But the skills to build RISC-V are going to propogate. Of course, that does not mean that everybody in the world is going to figure out how to build chips. That is clearly not my point. They will still be built primarily by a select few. But that is not unique to RISC-V by any stretch. In fact, less so.
The hard part about building a chip from scratch is not the ISA. You think that a world-class engineer working with ARM64 or amd64 today cannot design a RISC-V chip? That is like saying a carpenter building oak cabinets lacks the skills to make them with maple.
And since it is the same amount of work to start fresh regardless of ISA, why not start with RISC-V?
Except you do not have to start fresh with RISC-V because there are many, and will be many, many more, open designs to study and start with. Here is a 64 bit chip that implements the very latest RISC-V vector extensions:
https://github.com/tenstorrent/riscv-ocelot
Which, by the way, means that although most won't, anybody can build a RISC-V chip.
The RISC-V world will look like ARM. Most chip makers will license the core design off somebody else. But there will be more of those "somebody elses" to choose from. And there will be more people who choose to design their own silicon. Meta just bought Rivos. What for do you think? And they did not have to talk to ARM about it.
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NOTE:
The open source projects on this list are ordered by number of github stars.
The number of mentions indicates repo mentiontions in the last 12 Months or
since we started tracking (Dec 2020).
SystemVerilog Riscv discussion
SystemVerilog Riscv related posts
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How to design a more elegant and simple instraction decoder
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432-Core Chiplet-Based RISC-V Chip Nearly Ready to Blast Into Space
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Which FPGA for getting into RISC-V?
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The CORE-V CVA6 is a RISC-V CPU capable of booting Linux
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ALU CIRCUIT DESIGN LEVEL VS RTL LEVEL
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Looking for a suitable open-source RISC-V for an embedded project
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Nvidia: GPUs can do better chip design in a few days than 10 man year
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A note from our sponsor - SaaSHub
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Index
What are some of the best open-source Riscv projects in SystemVerilog? This list will help you:
| # | Project | Stars |
|---|---|---|
| 1 | cv32e40p | 1,244 |
| 2 | scr1 | 980 |
| 3 | Cores-VeeR-EH1 | 945 |
| 4 | Cores-VeeR-EL2 | 338 |
| 5 | riscv-simple-sv | 202 |
| 6 | HaDes-V | 165 |
| 7 | risc-v-single-cycle | 72 |
| 8 | friscv | 32 |
| 9 | rp32 | 22 |
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