SystemVerilog Hardware

Open-source SystemVerilog projects categorized as Hardware

Top 4 SystemVerilog Hardware Projects

  • ibex

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

  • Project mention: Major Changes at RISC-V Designer SiFive | news.ycombinator.com | 2023-10-24

    We've had people consider Ibex for space applications, well verified and has a dual-core lockstep option: https://github.com/lowRISC/ibex.

    An ETH Zurich team have done a triple core lockstep version for cubesats: https://www.theregister.com/2023/10/05/riscv_microcontroller...

  • axi

    AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

    InfluxDB logo
  • eurorack-pmod

    Hardware and gateware for getting started in FPGA-based audio synthesis with open source tools.

  • libsv

    An open source, parameterized SystemVerilog digital hardware IP library

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

SystemVerilog Hardware related posts

Index

What are some of the best open-source Hardware projects in SystemVerilog? This list will help you:

Project Stars
1 ibex 1,237
2 axi 920
3 eurorack-pmod 159
4 libsv 19

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