SystemVerilog Rv32i

Open-source SystemVerilog projects categorized as Rv32i
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Topics: Systemverilog Riscv risc-v Verilog Fpga
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Top 3 SystemVerilog Rv32i Projects

  • scr1

    SCR1 is a high-quality open-source RISC-V MCU core in Verilog

  • risc-v-single-cycle

    A Single Cycle Risc-V 32 bit CPU

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

    InfluxDB logo

  • ApogeoRV

    A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

SystemVerilog Rv32i related posts

  • Mikron MIK32 – Made in Russia 32-bit RISC-V MCU... for about $6

    1 project | /r/RISCV | 10 Sep 2021

Index

What are some of the best open-source Rv32i projects in SystemVerilog? This list will help you:

Project Stars
1 scr1 776
2 risc-v-single-cycle 21
3 ApogeoRV 13

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