litex
Build your hardware, easily! (by enjoy-digital)
neorv32
:rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. (by stnolting)
| litex | neorv32 | |
|---|---|---|
| 29 | 77 | |
| 2,688 | 1,429 | |
| - | - | |
| 9.7 | 9.9 | |
| 6 days ago | 4 days ago | |
| C | C | |
| GNU General Public License v3.0 or later | BSD 3-clause "New" or "Revised" License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
litex
Posts with mentions or reviews of litex.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-11-06.
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FPGA Dev Boards for $150 or Less
https://github.com/enjoy-digital/litex
they have tutorials, you can get compatible boards for around $20
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
With LiteX you can synthesize a VexRiscV processor. You can run Linux on it. The toolchain is pretty easy to use, as long as you use Xilinx Vivado to compile to gateware.
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Sunset TCL scripts ?
LiteX is a great example of a Python-first flow. However, they have chosen not to subordinate the scripting environment to a GUI toolchain - EDA vendors are unlikely to choose the same trade.
- synthesizing and using the Ibex RISC-V core
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Been messing around with litex and migen on my Tang Primer 20K
To lean these: https://github.com/enjoy-digital/litex, https://github.com/m-labs/migen
- CPU design for college project
- How can I learn about RISC-V and use case? I want to do a project for begginers
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How Much Would It Cost For A Truly Open Source RISC-V SOC?
If you use LiteX to generate a VexRiscV system-on-a-chip, you can include an open source DDR DRAM PHY. This works on Xilinx Spartan-6, Spartan7Artix7/Kintex7/Virtex7 FPGAs, and Lattice ECP5 FPGAs. DDR/LPDDR/DDR2/DDR3 depending on the FPGA.
- LiteX: Build Hardware Easily
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Using FPGAs for computations as a beginner
I am interested in trying out FPGAs for the purpose of running specific calculations more efficiently. Since the calculations themselves are quite complex, I would need to be able to program in a relatively high-level language. I've seen that designing SoC in Python is possible, for example with Litex (https://github.com/enjoy-digital/litex) or Amaranth (https://github.com/amaranth-lang/). I don't want to spend hundreds of hours learning about FPGAs, but I'm prepared to take on a challenge.
neorv32
Posts with mentions or reviews of neorv32.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-03-08.
- An example of how to add the A ISA extension's LR/SC operations into an open-source architecture
- NEORV32 - A tiny, customizable and highly extensible MCU-class 32-bit RISC-V microcontroller-like SoC written in platform-independent VHDL
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Recommendations for RISC-V on FPGA
How about NEORV32?
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SUGGEST AN OPEN SOURCE RISC-V CORE DESIGNED IN VERILOG
GitHub - stnolting/neorv32: 🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. this one is good but is written in VHDL though
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RISCV CPU using PL on Pynq Z2 Development Board
NEORV32 is an open source soft core and very well documented. I would recommend you to take a look at it and play around a bit. And it is certainly possible to have a soft core running on only the PL side without PS interference.
- A tiny 1-Wire controller for FPGAs (in VHDL)
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Anyone want to share some embedded projects they have done?
Maybe not a classic (whatever that means...) project, but I am working (together with others) on a RISC-V microcontroller for FPGAs: https://github.com/stnolting/neorv32
What are some alternatives?
When comparing litex and neorv32 you can also consider the following projects:
nmigen-tutorial - A tutorial for using nmigen
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
SpinalHDL - Scala based HDL
linux-on-litex-vexriscv - Linux on LiteX-VexRiscv
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
picoMIPS - picoMIPS processor doing affine transformation
SaxonSoc - SoC based on VexRiscv and ICE40 UP5K
upduino-projects - Various VHDL projects I've worked on for the Upduino v2.0 and v3.0
openwifi - open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
chipyard - An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
verilog-ethernet - Verilog Ethernet components for FPGA implementation
lxp32-cpu - A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set