synthesizing and using the Ibex RISC-V core

• ibex

  20 1,244 8.3 SystemVerilog

  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

  

I am pretty new to RISC-V and open-source hardware and just began learning and working with them as part of my research. I searched about different models that have some credible documents and research done into them and decided I would try and use the ibex as the hardware language is easier for me to follow too.

• litex

  29 2,683 9.7 C

  Build your hardware, easily!

• InfluxDB

  www.influxdata.com sponsored

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• ibex-demo-system

  5 38 8.3 C

  A demo system for Ibex including debug support and some peripherals

  

They have a demo repo, which includes a simple SoC with ibex been integrated in there https://github.com/lowrisc/ibex-demo-system. For building bitstream fusesoc is used

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