C risc-v

Open-source C projects categorized as risc-v

Top 21 C risc-v Projects

  • rt-thread

    RT-Thread is an open source IoT real-time operating system (RTOS).

    Project mention: Any decent RTOS for my Longan Nano? | reddit.com/r/RISCV | 2023-02-24

    The GD32VF103 is also supported by RT-Thread.

  • chipyard

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

    Project mention: Ao486_MiSTer: i486 core for the MiSTer FPGA gaming system | news.ycombinator.com | 2023-03-03

    Many companies do just write entire modern SoCs in straight Verilog (maybe with some autogenerated Verilog hacked in there) with no other major organization tools aside from the typical project management stuff. The load-store unit of a modern CPU alone easily exceeds 10k lines of Verilog. It's a similar thing as people who work with kernels—after all, the page table management code in a modern operating system like Linux is absolutely monstrous but still people are able to understand it well enough to be able to make the changes they need and get out.

    If you are interested in other languages which hope to make this sort of stuff easier, I'd recommend taking a look at design productivity languages like Chisel and it's associated Chipyard [1], SpinalHDL [2], and Bluespec [3]. Each of these are meant to make defining extremely complex hardware more manageable for humans and there's a lot of interesting work going on right now with each of them.

    [1] https://github.com/ucb-bar/chipyard

    [2] https://github.com/SpinalHDL/SpinalHDL

    [3] https://github.com/B-Lang-org/bsc

  • SonarQube

    Static code analysis for 29 languages.. Your projects are multi-language. So is SonarQube analysis. Find Bugs, Vulnerabilities, Security Hotspots, and Code Smells so you can release quality code every time. Get started analyzing your projects today for free.

  • RVVM

    The RISC-V Virtual Machine

    Project mention: RVVM – The RISC-V Virtual Machine | reddit.com/r/patient_hackernews | 2023-03-03
  • shecc

    A self-hosting and educational C compiler

  • vivado-risc-v

    Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

    Project mention: Recommendations for RISC-V on FPGA | reddit.com/r/FPGA | 2023-03-08

    Hello. I'm looking into implementing RISC-V on an FPGA for a school project. The two repos I'm looking into using are the Ariane and RocketChip repos. Both look actively maintained, but RocketChip has more recent releases, and it's used by this other repo that creates a block design in Vivado with the RISC-V RTL. However, we would also like to be able to make changes to the core, and I'm afraid that scala/Chisel might be difficult to learn. Ariane looks like SystemVerilog while RocketChip is mostly Chisel. Does any have recommendations on which RISC-V repo would be good to use for a project?

  • esp32_usb_soft_host

    ESP32 software USB host through general IO pins. We can connect up to 4 USB-LS HID (keyboard mouse joystick) devices simultaneously.

    Project mention: ESP32 and A barcode scanner | reddit.com/r/esp32 | 2023-03-11

    I can't vouch for it but there is a project which implements a USB host in software on an ESP32 here: https://github.com/sdima1357/esp32_usb_soft_host

  • bl_mcu_sdk

    bl_mcu_sdk is MCU software development kit provided by Bouffalo Lab Team for BL602/BL604, BL702/BL704/BL706, BL616/BL618, BL808 and other series of RISC-V based chips in the future.

    Project mention: USB CDC/Serial REPL for PikaPython | reddit.com/r/GowinFPGA | 2023-03-17
  • InfluxDB

    Access the most powerful time series database as a service. Ingest, store, & analyze all types of time series data in a fully-managed, purpose-built database. Keep data forever with low-cost storage and superior data compression.

  • bl_iot_sdk

    BL602/BL702 SDK. Any technical topic, please access the following link. (by bouffalolab)

    Project mention: Boufallo Lab BL616/BL618 RISC-V MCU Supports WiFi 6, Bluetooth 5.2, and Zigbee | news.ycombinator.com | 2022-12-31
  • Zenroom

    Smart-contracts in human-like language.

    Project mention: Zenroom: NEW Data - star count:153.0 | reddit.com/r/algoprojects | 2023-02-25
  • FT800-FT813

    Multi-Platform C code Library for EVE graphics controllers from FTDI / Bridgetek (FT810, FT811, FT812, FT813, BT815, BT816, BT817, BT818)

    Project mention: FT81x EVE register definition library? | reddit.com/r/embedded | 2022-09-22

    Rudolph Riedel\'s library

  • nuclei-sdk

    Nuclei RISC-V Software Development Kit

  • riscv_em

    Simple risc-v emulator, able to run linux, written in C.

    Project mention: Booting Linux inside a RISC-V emulator running on TempleOS. | reddit.com/r/TempleOS_Official | 2022-08-17

    I've been working on trying to get my old MicroPython TOS port running again, but decided to test out the code which allows me to run C code compiled with gcc on TOS with something more robust so I looked into getting this RISC-V emulator running. Obviously the timing is wrong and you can't do much, but it's still cool to boot the Linux kernel on TOS and have a minimal working busybox environment.

  • RISC-V-Computer-2.0

    An enhanced yet simplified RISC-V based computer build with Logisim

    Project mention: My Logisim RISC-V Computer executing Dijkstra's Shunting Yard algorithm written in C to evaluate single digit arithmetic expressions. | reddit.com/r/RISCV | 2022-09-10

    Project repo: https://github.com/MazinCE/RISC-V-Computer-2.0

  • riscv-vm

    A Small RISC-V Virtual Machine

    Project mention: Making an emulator: Questions | reddit.com/r/RISCV | 2023-01-23
  • libhelix-mp3

    Fixed-point MP3 decoder (RISC-V port)

  • spu32

    Small Processing Unit 32: A compact RV32I CPU written in Verilog

  • quasiSoC

    No-MMU Linux capable RISC-V SoC designed to be useful.

    Project mention: No-MMU Linux Capable RISC-V SoC | news.ycombinator.com | 2022-12-02
  • qemu-pinning

    My QEMU fork with pinning (affinity) support and a few tweaks.

  • Toast-RV32i

    Pipelined RISC-V RV32I Core in Verilog

  • ch32v307-gnumake

    Makefile project for ch32v307

    Project mention: RISC-V MCU development boards | reddit.com/r/RISCV | 2023-02-18

    Yep, that would scale better. Also using modified startup table is a possibility.

  • risc-v-examples

    RISC-V examples for GD32V, K210, and QEMU

  • SaaSHub

    SaaSHub - Software Alternatives and Reviews. SaaSHub helps you find the best software and product alternatives

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020). The latest post mention was on 2023-03-17.

C risc-v related posts


What are some of the best open-source risc-v projects in C? This list will help you:

Project Stars
1 rt-thread 8,113
2 chipyard 1,041
3 RVVM 583
4 shecc 515
5 vivado-risc-v 427
6 esp32_usb_soft_host 341
7 bl_mcu_sdk 228
8 bl_iot_sdk 213
9 Zenroom 154
10 FT800-FT813 96
11 nuclei-sdk 77
12 riscv_em 64
13 RISC-V-Computer-2.0 60
14 riscv-vm 55
15 libhelix-mp3 55
16 spu32 52
17 quasiSoC 41
18 qemu-pinning 31
19 Toast-RV32i 30
20 ch32v307-gnumake 4
21 risc-v-examples 2
SaaSHub - Software Alternatives and Reviews
SaaSHub helps you find the best software and product alternatives