litex
openwifi
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| litex | openwifi | |
|---|---|---|
| 29 | 10 | |
| 2,683 | 3,558 | |
| - | 2.4% | |
| 9.7 | 7.6 | |
| 4 days ago | 25 days ago | |
| C | C | |
| GNU General Public License v3.0 or later | GNU Affero General Public License v3.0 |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
litex
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FPGA Dev Boards for $150 or Less
https://github.com/enjoy-digital/litex
they have tutorials, you can get compatible boards for around $20
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
With LiteX you can synthesize a VexRiscV processor. You can run Linux on it. The toolchain is pretty easy to use, as long as you use Xilinx Vivado to compile to gateware.
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Sunset TCL scripts ?
LiteX is a great example of a Python-first flow. However, they have chosen not to subordinate the scripting environment to a GUI toolchain - EDA vendors are unlikely to choose the same trade.
- synthesizing and using the Ibex RISC-V core
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Been messing around with litex and migen on my Tang Primer 20K
To lean these: https://github.com/enjoy-digital/litex, https://github.com/m-labs/migen
- CPU design for college project
- How can I learn about RISC-V and use case? I want to do a project for begginers
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How Much Would It Cost For A Truly Open Source RISC-V SOC?
If you use LiteX to generate a VexRiscV system-on-a-chip, you can include an open source DDR DRAM PHY. This works on Xilinx Spartan-6, Spartan7Artix7/Kintex7/Virtex7 FPGAs, and Lattice ECP5 FPGAs. DDR/LPDDR/DDR2/DDR3 depending on the FPGA.
- LiteX: Build Hardware Easily
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Using FPGAs for computations as a beginner
I am interested in trying out FPGAs for the purpose of running specific calculations more efficiently. Since the calculations themselves are quite complex, I would need to be able to program in a relatively high-level language. I've seen that designing SoC in Python is possible, for example with Litex (https://github.com/enjoy-digital/litex) or Amaranth (https://github.com/amaranth-lang/). I don't want to spend hundreds of hours learning about FPGAs, but I'm prepared to take on a challenge.
openwifi
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Hold on there: WPA3 connections fail after 11 hours
There is some open source firmware for very old WiFi chips:
https://wiki.debian.org/Firmware/Open#Radio
There is also some FPGA based open source WiFi chip things:
https://github.com/open-sdr/openwifi
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WiFi: “beamforming” only begins to describe it (2014)
https://news.ycombinator.com/item?id=27133079 :
https://ans.unibs.it/projects/csi-murder/ enabled by https://github.com/open-sdr/openwifi Both partially funded by EU's Horizon2020 program.
Openwifi talk at FOSDEM 2020 https://www.youtube.com/watch?v=8q5nHUWP43U
- Tesla Coil Zenneck Wave TV White Space Wifi Network
- Any way to transmit 802.11(wifi) signals to a receiver
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Can 5G be used as surveillance radar? U.S. military funds Binghamton research
one of the developments out of his openwifi project is a 'Openwifi CSI fuzzer WiSec21 demo interview' https://www.youtube.com/watch?v=Jp2ImjCnlkQ
https://github.com/open-sdr/openwifi/blob/master/doc/app_not...
- Is there an intersection between FPGA and Wireless Comms?
- How many more years until we have a completely open source RISC-V SOC?
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Ask HN: How to get started with 5G as a software developer
You could try the Xilinx ZC706 with an ADI9361 based FMCOMMS board. The OpenWIFI team has a few configurations listed on their readme that are popular: https://github.com/open-sdr/openwifi. I think these setups will still cost >$1000USD and require considerable effort to get going - I don’t know of a <$1000 SDR setup for 5G development that would be easy to setup and get going with. Curious if anyone knows of one.
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BladeRF-wiphy: open-source IEEE 802.11 compatible Software Defined Radio modem
Nice one Nuand, the BladeRF v2 looks like a very interesting alternative SDR modem to the cheaper Adalm Pluto educational kit by Analog Devices, the manufacturer of the transceiver chip being used by the BladeRF v2.
There is another alternative open source WiFi stack, openwifi and it has been discussed in HN before [2][3].
[1]https://www.analog.com/en/design-center/evaluation-hardware-...
[2 ]https://github.com/open-sdr/openwifi
[3]https://news.ycombinator.com/item?id=24273919
What are some alternatives?
nmigen-tutorial - A tutorial for using nmigen
bladeRF-wiphy - bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem
SpinalHDL - Scala based HDL
esp32-wifi-penetration-tool - Exploring possibilities of ESP32 platform to attack on nearby Wi-Fi networks.
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
gr-ieee802-11 - IEEE 802.11 a/g/p Transceiver
SaxonSoc - SoC based on VexRiscv and ICE40 UP5K
direwolf - Dire Wolf is a software "soundcard" AX.25 packet modem/TNC and APRS encoder/decoder. It can be used stand-alone to observe APRS traffic, as a tracker, digipeater, APRStt gateway, or Internet Gateway (IGate). For more information, look at the bottom 1/4 of this page and in https://github.com/wb2osz/direwolf/blob/dev/doc/README.md
verilog-ethernet - Verilog Ethernet components for FPGA implementation
ZynqMP-FPGA-Linux - FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)
litedram - Small footprint and configurable DRAM core
rtl-wmbus - Software defined receiver for wireless M-Bus with RTL-SDR