Top 6 C Verilog Projects

openwifi

3 3,098 9.3 C

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

Project mention: WiFi: “beamforming” only begins to describe it (2014) | news.ycombinator.com | 2023-02-02

https://news.ycombinator.com/item?id=27133079 :
https://ans.unibs.it/projects/csi-murder/ enabled by https://github.com/open-sdr/openwifi Both partially funded by EU's Horizon2020 program.
Openwifi talk at FOSDEM 2020 https://www.youtube.com/watch?v=8q5nHUWP43U
NyuziProcessor

0 1,700 0.0 C

GPGPU microprocessor architecture
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red-pitaya-notes

0 277 6.1 C

Notes on the Red Pitaya Open Source Instrument
poprc

0 215 2.2 C

A Compiler for the Popr Language
spu32

0 55 0.0 C

Small Processing Unit 32: A compact RV32I CPU written in Verilog
Toast-RV32i

0 30 0.0 C

Pipelined RISC-V RV32I Core in Verilog

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020). The latest post mention was on 2023-02-02.