litex
nmigen-tutorial
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litex | nmigen-tutorial | |
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29 | 3 | |
2,683 | 301 | |
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9.7 | 1.8 | |
4 days ago | about 3 years ago | |
C | ||
GNU General Public License v3.0 or later | Creative Commons Attribution Share Alike 4.0 |
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litex
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FPGA Dev Boards for $150 or Less
https://github.com/enjoy-digital/litex
they have tutorials, you can get compatible boards for around $20
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
With LiteX you can synthesize a VexRiscV processor. You can run Linux on it. The toolchain is pretty easy to use, as long as you use Xilinx Vivado to compile to gateware.
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Sunset TCL scripts ?
LiteX is a great example of a Python-first flow. However, they have chosen not to subordinate the scripting environment to a GUI toolchain - EDA vendors are unlikely to choose the same trade.
- synthesizing and using the Ibex RISC-V core
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Been messing around with litex and migen on my Tang Primer 20K
To lean these: https://github.com/enjoy-digital/litex, https://github.com/m-labs/migen
- CPU design for college project
- How can I learn about RISC-V and use case? I want to do a project for begginers
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How Much Would It Cost For A Truly Open Source RISC-V SOC?
If you use LiteX to generate a VexRiscV system-on-a-chip, you can include an open source DDR DRAM PHY. This works on Xilinx Spartan-6, Spartan7Artix7/Kintex7/Virtex7 FPGAs, and Lattice ECP5 FPGAs. DDR/LPDDR/DDR2/DDR3 depending on the FPGA.
- LiteX: Build Hardware Easily
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Using FPGAs for computations as a beginner
I am interested in trying out FPGAs for the purpose of running specific calculations more efficiently. Since the calculations themselves are quite complex, I would need to be able to program in a relatively high-level language. I've seen that designing SoC in Python is possible, for example with Litex (https://github.com/enjoy-digital/litex) or Amaranth (https://github.com/amaranth-lang/). I don't want to spend hundreds of hours learning about FPGAs, but I'm prepared to take on a challenge.
nmigen-tutorial
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recommended free (open source) verification platform ?
nmigen-tutorial
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Designing a RISC-V CPU, Part 1: Learning hardware design as a software engineer
I've had this recommended and it looks v promising! https://vivonomicon.com/2020/04/14/learning-fpga-design-with...
Someone above has mentioned Robert Baruch too: https://github.com/RobertBaruch/nmigen-tutorial
I also found this helpful: http://blog.lambdaconcept.com/doku.php?id=nmigen:tutorial
And there is of course the IRC channel if you want to ask people questions, #nmigen on irc.freenode.net
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FPGA dev board that's cheap, simple and supported by OSS toolchain
If you are already familiar with Python I could recommend start with this tutorial: https://github.com/RobertBaruch/nmigen-tutorial
What are some alternatives?
SpinalHDL - Scala based HDL
linux-on-litex-vexriscv - Linux on LiteX-VexRiscv
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
RISCV-FiveStage - Marginally better than redstone
SaxonSoc - SoC based on VexRiscv and ICE40 UP5K
apio - :seedling: Open source ecosystem for open FPGA boards
openwifi - open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
wyre - Hardware definition language that compiles to Verilog
verilog-ethernet - Verilog Ethernet components for FPGA implementation
UPduino-v3.0 - UPduino 3.0: new 4 layer layout, various other improvements
litedram - Small footprint and configurable DRAM core
icebreaker - Small and low cost FPGA educational and development board