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FPGA Thread: Bluespec SystemVerilog is now completely open source, very nice HDL although quite opinionated.
https://github.com/B-Lang-org/bsc
it's Haskell underneath (https://xkcd.com/356/)
https://github.com/esden/wtfpga
https://github.com/im-tomu/fomu-toolchain
Workshop:
If you are already familiar with Python I could recommend start with this tutorial: https://github.com/RobertBaruch/nmigen-tutorial
if you're more comfortable with the CLI, you should take a look at the apio project (https://github.com/FPGAwars/apio). It neatly bundles all the required tools. Regarding HDLs, I'm still learning so can't offer any good advice on that.
"Linux on LiteX-Vexriscv" [1] is an easy way to get started. The readme includes a table of supported boards, as well as the amount of memory and maximum tested clock frequency.
I played with it on an OrangeCrab [2], and was shocked by how easy it was to get it running and by how well it worked despite the slow clock. The SoC includes peripherals for GPIO, PWM, serial interfaces, etc., and the project includes kernel drivers to talk to them. On the OrangeCrab, everything I thought to try pretty much just worked.
That being said, this is mostly just a fun exercise in SoC building, and isn't going to give you anywhere close to PC performance.
[1] https://github.com/litex-hub/linux-on-litex-vexriscv
[2] https://1bitsquared.com/products/orangecrab
There's probably no guarantees but in my experience if two devices link to the same version xml file their peripheral registers at least will be identical. Quirks and silicon bugs, you are on your own of course... but then the ref manual doesn't help with that either!
[1] https://github.com/esden/stm32cube-database/tree/master/db/m...