RISCV CPU using PL on Pynq Z2 Development Board

This page summarizes the projects mentioned and recommended in the original post on /r/FPGA

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  • neorv32

    :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

  • NEORV32 is an open source soft core and very well documented. I would recommend you to take a look at it and play around a bit. And it is certainly possible to have a soft core running on only the PL side without PS interference.

  • WorkOS

    The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.

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NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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