Trending VHDL Projects

Top 19 Trending VHDL Projects

• fpga-fft

  1 106 6.6%

  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

  

• surf

  2 350 5.7%

  A huge VHDL library for FPGA development (by slaclab)

  

• vscode-terosHDL

  3 574 3.5%

  VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

  

• SNES_MiSTer

  4 205 3.4%

  SNES for MiSTer

  

• vunit

  5 749 2.3%

  VUnit is a unit testing framework for VHDL/SystemVerilog

  

• Learn-FPGA-Programming

  6 180 2.2%

  Learn FPGA Programming, published by Packt

  

• ghdl

  7 2,419 2.1%

  VHDL 2008/93/87 simulator

  

• PSX_MiSTer

  8 219 1.8%

  PSX for MiSTer

  

• mega65-core

  9 246 1.6%

  MEGA65 FPGA core

  

• ghdl-yosys-plugin

  10 311 1.6%

  VHDL synthesis (based on ghdl)

  

• bladeRF-wiphy

  11 396 1.5%

  bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

  

• satcat5

  12 423 1.4%

  SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.

  

• GBA_MiSTer

  13 147 0.7%

  GBA for MiSTer

  

• aws-fpga

  14 1,515 0.5%

  Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

  

• Hastlayer-SDK

  15 302 0.3%

  Turning .NET software into FPGA hardware for faster execution and lower power usage.

  

• dvb_fpga

  16 111 0.0%

  RTL implementation of components for DVB-S2

  

• zpu

  17 236 0.0%

  The Zylin ZPU

  

• patmos

  18 135 0.0%

  Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project

  

• AXI4

  19 129 0.0%

  AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

  

Index