VHDL Fpga

Open-source VHDL projects categorized as Fpga
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Topics: Vhdl Hardware neorv32 risc-v Asic
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Top 23 VHDL Fpga Projects

  • vunit

    VUnit is a unit testing framework for VHDL/SystemVerilog

  • openfpga-SNES

    SNES for the Analogue Pocket

    • Project mention: Donkey Kong Country running (or rather rolling) on the Analogue Pocket | /r/snes | 2023-05-22

    OpenFPGA

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  • forth-cpu

    A Forth CPU and System on a Chip, based on the J1, written in VHDL

  • Hastlayer-SDK

    Turning .NET software into FPGA hardware for faster execution and lower power usage.

  • surf

    A huge VHDL library for FPGA development (by slaclab)

  • spi-fpga

    SPI master and SPI slave for FPGA written in VHDL

  • neoTRNG

    🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).

    • Project mention: A really tiny and platform-independent true random number generator for FPGAs and ASICs | /r/cryptography | 2023-11-06

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  • w11

    PDP-11/70 CPU core and SoC

  • sdram-fpga

    A FPGA core for a simple SDRAM controller.

    • Project mention: Seeking Help with SDRAM Controller Debugging | /r/FPGA | 2023-06-28

    Initially, I attempted to adapt an SDRAM [controller project I found on GitHub]( https://github.com/nullobject/sdram-fpga/blob/master/sdram.vhd) to my board by configuring the necessary parameters such as timing constants and memory dimensions.

  • dvb_fpga

    RTL implementation of components for DVB-S2

  • catapult-v3-smartnic-re

    Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)

  • fpga-fft

    A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

  • uart-for-fpga

    Simple UART controller for FPGA written in VHDL

  • neorv32-setups

    📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.

    • Project mention: How to find the pin mapping for connecting Zybo Z7-20 or Nexyx A7 board to a computer over USB-JTAG? | /r/FPGA | 2023-08-03

    Hello. In my project, I am trying to run NEORV32 processor in an FPGA. My plan is to perform debugging of the design over JTAG after running it on an FPGA. I currently have a Zybo Z7-20 and a Nexyx A7 board at hand. As per my understanding, for both of the boards, I need to find the board pins associated with JTAG and manually connect them through the constraint file. I was going through the reference manuals for both FPGAs but couldn't find the pins that need to be connected.

  • fpu

    IEEE 754 floating point library in system-verilog and vhdl (by taneroksuz)

  • neoapple2

    Port of Stephen A. Edwards's Apple2fpga to PYNQ-Z1 (Xilinx Zynq FPGA), to emulate an Apple II+.

  • Compliance-Tests

    Tests to evaluate the support of VHDL 2008 and VHDL 2019 features

  • ndk-app-minimal

    Minimal Application based on Network Development Kit (NDK) for FPGA cards

  • fpu-sp

    IEEE 754 floating point library in system-verilog and vhdl

    • Project mention: Intel discontinues Nios II IP | /r/FPGA | 2023-06-14

    My team has a solution in place already, which was to write all of our floating point code to call macros rather than putting arithmetic in the code. This allowed us to port easily to an RV32IM CPU (a fork of this one) then memory map an FPU onto it, the macros were then changed to atomically access the FPU registers for any floating point arithmetic. In Intel chips we are using the Nios II floating point hardware 2 (which can be instantiated separately), in other vendors we use a combination of operators from the Opencores FPU and this one, depending upon what operators are selected via generics, the maths library will pick up what configuration is used and choose the available operators.

  • kvm-ip-zynq

    KVM over IP Gateway targeting Zynq-7000 SoC

  • simple-riscv

    A simple three-stage RISC-V CPU

  • pocket-cnn

    CNN-to-FPGA-framework for small CNN, written in VHDL and Python

  • vhdl-axis-uart

    UART to AXI Stream interface written in VHDL

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NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

VHDL Fpga related posts

Index

What are some of the best open-source Fpga projects in VHDL? This list will help you:

Project Stars
1 vunit 682
2 openfpga-SNES 371
3 forth-cpu 315
4 Hastlayer-SDK 293
5 surf 285
6 spi-fpga 157
7 neoTRNG 152
8 w11 116
9 sdram-fpga 105
10 dvb_fpga 96
11 catapult-v3-smartnic-re 93
12 fpga-fft 87
13 uart-for-fpga 84
14 neorv32-setups 52
15 fpu 46
16 neoapple2 41
17 Compliance-Tests 25
18 ndk-app-minimal 23
19 fpu-sp 20
20 kvm-ip-zynq 19
21 simple-riscv 19
22 pocket-cnn 17
23 vhdl-axis-uart 15

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