hdlConvertor VS edalize

Compare hdlConvertor vs edalize and see what are their differences.

hdlConvertor

Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4 (by Nic30)
Parser Verilog Fpga Vhdl Systemverilog systemverilog-parser vhdl-parser verilog-parser antrl4 Python
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edalize

An abstraction library for interfacing EDA tools (by olofk)
eda Fpga fossi Xilinx altera lattice yosys Synthesis Simulation Verilog Vhdl Systemverilog Verilator icarus-verilog modelsim riviera-pro ghdl icestorm spyglass vivado
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hdlConvertor edalize
1 4
266 593
- -
5.8 7.2
3 months ago 6 days ago
C++ Python
MIT License BSD 2-clause "Simplified" License
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

hdlConvertor

Posts with mentions or reviews of hdlConvertor. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-01-24.
  • VHDL backend
    2 projects | /r/FPGA | 24 Jan 2021
    Have you seen https://github.com/dalance/sv-parser, https://github.com/google/verible, https://github.com/alainmarcel/Surelog, https://github.com/Nic30/hdlConvertor? I think there was at least one more that I stumbled across, but can't find at the moment.

edalize

Posts with mentions or reviews of edalize. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-02-06.
  • Dropping EDA-GUI's 101
    1 project | /r/FPGA | 17 Feb 2023
    Check out FuseSoC: https://github.com/olofk/fusesoc which can handle Vivado builds for you (utilizing edalize: https://github.com/olofk/edalize) along with some nice package management. It can run against multiple tools so you can also get it to build simulations using Verilator or a commercial EDA tool if you have access to them.
  • Introduction to FPGAs
    9 projects | news.ycombinator.com | 6 Feb 2023
    Check out https://github.com/olofk/fusesoc. It gives you a command line build flow that can drive Vivado (along with many other eda tools via edalize https://github.com/olofk/edalize) without having to touch the GUI (though you might want it for programming the board, though FuseSoC can do that too).
  • Compiling Code into Silicon
    10 projects | news.ycombinator.com | 7 Dec 2021
    This reminds me very much of edalize[1], which does something very similar.

    [1]: https://github.com/olofk/edalize

  • Olof Kindgren on LinkedIn: We have a new world record! 6000 RISC-V cores in a single chip!
    3 projects | /r/RISCV | 24 Sep 2021

What are some alternatives?

When comparing hdlConvertor and edalize you can also consider the following projects:

circt - Circuit IR Compilers and Tools

fusesoc - Package manager and build abstraction tool for FPGA/ASIC development

vscode-terosHDL - VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

skywater-pdk - Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

naja-verilog - A standalone structural (gate-level) verilog parser

freepdk-45nm - ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen

rggen - Code generation tool for control and status registers

apio - :seedling: Open source ecosystem for open FPGA boards

Surelog - SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

icestudio - :snowflake: Visual editor for open FPGA boards

verible - Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

hdlConvertor vs circt edalize vs fusesoc hdlConvertor vs vscode-terosHDL edalize vs skywater-pdk hdlConvertor vs naja-verilog edalize vs freepdk-45nm hdlConvertor vs rggen edalize vs apio hdlConvertor vs Surelog edalize vs icestudio hdlConvertor vs verible edalize vs rggen