hdlConvertor
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4 (by Nic30)
Surelog
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX (by chipsalliance)
| hdlConvertor | Surelog | |
|---|---|---|
| 1 | 1 | |
| 266 | 330 | |
| - | 2.7% | |
| 5.8 | 9.4 | |
| 3 months ago | 2 months ago | |
| C++ | C++ | |
| MIT License | Apache License 2.0 |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
hdlConvertor
Posts with mentions or reviews of hdlConvertor.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-01-24.
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VHDL backend
Have you seen https://github.com/dalance/sv-parser, https://github.com/google/verible, https://github.com/alainmarcel/Surelog, https://github.com/Nic30/hdlConvertor? I think there was at least one more that I stumbled across, but can't find at the moment.
Surelog
Posts with mentions or reviews of Surelog.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-02-05.
What are some alternatives?
When comparing hdlConvertor and Surelog you can also consider the following projects:
circt - Circuit IR Compilers and Tools
verible - Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
vscode-terosHDL - VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
slang - SystemVerilog compiler and language services
naja-verilog - A standalone structural (gate-level) verilog parser
sleighcraft - sleigh craft!
rggen - Code generation tool for control and status registers
f4pga-arch-defs - FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
clash-ghc - Haskell to VHDL/Verilog/SystemVerilog compiler
quick-lint-js - quick-lint-js finds bugs in JavaScript programs