VHDL backend

This page summarizes the projects mentioned and recommended in the original post on /r/FPGA

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  • hdlConvertor

    Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4

  • Have you seen https://github.com/dalance/sv-parser, https://github.com/google/verible, https://github.com/alainmarcel/Surelog, https://github.com/Nic30/hdlConvertor? I think there was at least one more that I stumbled across, but can't find at the moment.

  • circt

    Circuit IR Compilers and Tools

  • Relevant: https://github.com/llvm/circt

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NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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