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A long long long time ago, I wrote this (currently very unmaintained) julia project, don't know if this is useful to you, but it's pretty clear that there is a LOT of potential for julia in this domain: https://github.com/interplanetary-robot/Verilog.jl
You don't need to have any particular skills except familiarity with Julia, but it's obviously an advantage to have a bio background - depending on what you're going to do.
Usually, the best packages come about when people are motivated to creating something specific, for example if they think the status quo in some domain is not good enough.
I'm sure we can dig up a handful of old, badly maintained projects that could use some love. Off the top of my head, it would be nice to have
* Micro-optimized our smith-waterman algorithm. That's probably fairly easy to get started with if you're not a bio person
* A number of our parsers have not been properly maintained. We use finite state automata https://github.com/BioJulia/Automa.jl to create parsers. That's for more advanced users
Feel free to get in touch on the Julia Slack, or send me an email :)
Maybe of interest in that context:
https://github.com/ModiaSim/Modia.jl
The authors of that tool have a strong background in modeling and simulation of differential algebraic equations. Not so much in designing DSLs, though, so there maybe some technical oddities. But I expect the simulation aspect to be quite decent.
I can attest first-hand to the "headache" that comes from semi company simulation environments. Not only are they horribly outdated (in Perl/Tcl), but they're different at every company you work at. There's no gold standard because the standard that these EDA companies ought to be making doesn't exist.
There needs to be an open initiative between semi companies to create a standard simulation environment -- with compilers, unit-test frameworks, and all sorts of simulation (gate-level, analog/mixed signal, emulation, etc). Hell, just give me a free IDE plugin for SystemVerilog that actually works.
This lack of a standard seems to me like the critical path in hardware design. I'm trying to support projects to fix this like SVLS (A language server for SystemVerilog: https://github.com/dalance/svls) but these are all hard problems to solve. This industry is relatively niche and doesn't seem to have many engineers interested in FOSS.
Also, the major point is that BLAS has little to no role played here. Algorithms which just hit BLAS are very suboptimal already. There's a tearing step which reduces the problem to many subproblems which is then more optimally handled by pure Julia numerical linear algebra libraries which greatly outperform OpenBLAS in the regime they are in:
https://github.com/YingboMa/RecursiveFactorization.jl#perfor...
And there are hooks in the differential equation solvers to not use OpenBLAS in many cases for this reason:
https://github.com/SciML/DiffEqBase.jl/blob/master/src/linea...
Instead what this comes out to is more of a deconstructed KLU, except instead of parsing to a single sparse linear solve you can do semi-independent nonlinear solves which are then spawning parallel jobs of small semi-dense linear solves which are handled by these pure Julia linear algebra libraries.
And that's only a small fraction of the details. But at the end of the day, if someone is thinking "BLAS", they are already about an order of magnitude behind on speed. The algorithms to do this effectively are much more complex than that.
The pure Julia (sub)BLAS (because they are incomplete right now) that benchmarks the best right now are Octavian and PaddedMatrices.jl. On Ryzen these BLAS's are doing extremely well:
https://github.com/JuliaLinearAlgebra/Octavian.jl/issues/24#...
but also on Intel:
https://chriselrod.github.io/PaddedMatrices.jl/dev/arches/ca...
I personally wouldn't spend too much time on BLAS-limited applications though, and this kind of circuit modeling is not one of them as I describe in another post. Also, it's 1000x at 99% accuracy: it's essentially a form of automated model order reduction which allows you to choose a tolerance and get more speedup matching the original circuit to the given tolerance.