Compiling Code into Silicon

1. freepdk-45nm

   1 1 163 10.0 Verilog

   ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen

   

   Pretty neat, a python tool that converts Verilog to an IC layout so that you can make your own custom SOC (assuming you have a substantial budget to pay for fab).

   Since it's not clearly stated on the front page, I had to go digging to figure out what processes it supports. Looks like FreePDK45, which is "an open-source generic process design kit (PDK) (i.e., does not correspond to any real process and cannot be fabricated)" [0], ASAP7 "Warning Work in progress (not ready for use)" [1] and Skywater130 which "As of May 2020, this repository is targeting the SKY130 process node. If the SKY130 process node release is successful then in the future more advanced technology nodes may become available." [2] The floorplanner supports their ZeroSOC [3] which I guess is based on TitanSOC [4]

   If this sounds negative, it's not, I just couldn't figure out what processes this was intended for without digging. ASAP7 is Arm and NCSU, and Skywater130 is Skywater and Google.

   [0] https://github.com/mflowgen/freepdk-45nm

2. CodeRabbit

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3. skywater-pdk

   2 29 3,081 0.0 Python

   Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

   

4. zerosoc

   3 2 56 7.3 SystemVerilog

   Demo SoC for SiliconCompiler.

   

5. opentitan

   4 16 2,735 10.0 SystemVerilog

   OpenTitan: Open source silicon root of trust

   

6. gssi

   5 1 3 10.0 TeX

   Stuff I worked on while at GSSI (L'Aquila, Italy)

   

   Personally I have fond memories of MyHDL [0], which may be seen as another "code-to-silicon" converter (or at least as the first step of a code-to-silicon workflow). I used it only briefly, and on a school project that had surprisingly little to do with actual hardware design [1], but it really felt "Pythonic" in the best possible way.

   [0]: https://www.myhdl.org/

   [1]: https://github.com/lou1306/gssi/tree/master/2pc

7. myhdl

   6 15 1,067 5.0 Python

   The MyHDL development repository

   

   Personally I have fond memories of MyHDL [0], which may be seen as another "code-to-silicon" converter (or at least as the first step of a code-to-silicon workflow). I used it only briefly, and on a school project that had surprisingly little to do with actual hardware design [1], but it really felt "Pythonic" in the best possible way.

   [0]: https://www.myhdl.org/

   [1]: https://github.com/lou1306/gssi/tree/master/2pc

8. Verilog.jl

   7 2 49 0.0 Julia

   Verilog for Julia

   

   It doesn't have to be. I once made a julia->verilog transpiler that even recompiled your julia functions with verilator, so you could verify that the code was correct.

   https://github.com/interplanetary-robot/Verilog.jl

   Of course, gaining traction on something like this is tricky.

   I actually think Erlang/BEAM would be a great choice for making EDA tools, because it has concurrent execution model that you could probably very easily make play nice in rudimentary simulations of circuits that have triggers (`always @` sort of stuff.

9. SaaSHub

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10. edalize

    8 4 669 8.1 Python

    An abstraction library for interfacing EDA tools

    

    This reminds me very much of edalize[1], which does something very similar.

    [1]: https://github.com/olofk/edalize

11. chisel

    9 25 4,198 9.8 Scala

    Chisel: A Modern Hardware Design Language (by chipsalliance)

    

    Seems similar to the Chisel compiler for RISC-V:

    https://github.com/chipsalliance/chisel3

12. openlane

    10 12 1,440 6.2 Python

    OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

    

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