mrisc32-a1
neorv32
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| mrisc32-a1 | neorv32 | |
|---|---|---|
| 3 | 77 | |
| 22 | 1,423 | |
| - | - | |
| 0.0 | 9.9 | |
| 8 months ago | 3 days ago | |
| VHDL | C | |
| - | BSD 3-clause "New" or "Revised" License |
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mrisc32-a1
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Got any good reads on floating point math design?
I saw a particularly efficient VHDL implementation in the mrisc32-a1, though this is lacking support for rounding modes. Together with the rest of the processor this is a very interesting project, I hope that the author progresses it further.
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Find the leading '0' Verilog question
Here is a different more logic gate:ish solution (in VHDL): https://github.com/mrisc32/mrisc32-a1/blob/master/rtl/alu/clz32.vhd
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Floating point unit in systemc
In my VHDL implementation I use the same iterative divider for integer and for floating-point: https://github.com/mrisc32/mrisc32-a1/blob/master/rtl/muldiv/div_impl.vhd
neorv32
- An example of how to add the A ISA extension's LR/SC operations into an open-source architecture
- NEORV32 - A tiny, customizable and highly extensible MCU-class 32-bit RISC-V microcontroller-like SoC written in platform-independent VHDL
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Recommendations for RISC-V on FPGA
How about NEORV32?
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SUGGEST AN OPEN SOURCE RISC-V CORE DESIGNED IN VERILOG
GitHub - stnolting/neorv32: 🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. this one is good but is written in VHDL though
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RISCV CPU using PL on Pynq Z2 Development Board
NEORV32 is an open source soft core and very well documented. I would recommend you to take a look at it and play around a bit. And it is certainly possible to have a soft core running on only the PL side without PS interference.
- A tiny 1-Wire controller for FPGAs (in VHDL)
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Anyone want to share some embedded projects they have done?
Maybe not a classic (whatever that means...) project, but I am working (together with others) on a RISC-V microcontroller for FPGAs: https://github.com/stnolting/neorv32
What are some alternatives?
cvfpu - Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
fpu-sp - IEEE 754 floating point library in system-verilog and vhdl
linux-on-litex-vexriscv - Linux on LiteX-VexRiscv
lxp32-cpu - A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
picoMIPS - picoMIPS processor doing affine transformation
forth-cpu - A Forth CPU and System on a Chip, based on the J1, written in VHDL
upduino-projects - Various VHDL projects I've worked on for the Upduino v2.0 and v3.0
hlsVHDL_floating_point
chipyard - An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
fpga-zynq - Support for Rocket Chip on Zynq FPGAs