Got any good reads on floating point math design?

• hlsVHDL_floating_point

  1 0 10.0 VHDL
  

• cvfpu

  1 361 4.9 SystemVerilog

  Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

  

OpenHWGroup's CVFPU (SystemVerilog), this is used by the CV32E40P. I had a go with this but couldn't get it to synthesise in Quartus Prime Lite.

• WorkOS

  workos.com sponsored

  The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.

  

• fpu-sp

  3 20 6.9 VHDL

  IEEE 754 floating point library in system-verilog and vhdl

I recently saw an interesting idea in this VHDL repository which combines addition and multiplication in a single fused multiply add unit. Division and square root are combined as well. In my opinion the FMADD block needs some more pipeline stages.

• mrisc32-a1

  3 22 0.0 VHDL

  Discontinued A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA

  

I saw a particularly efficient VHDL implementation in the mrisc32-a1, though this is lacking support for rounding modes. Together with the rest of the processor this is a very interesting project, I hope that the author progresses it further.

Suggest a related project