Floating point unit in systemc

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Vhdl Cpu Mrisc32 soft-core Risc

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  • mrisc32-a1

    Discontinued A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA

    • In my VHDL implementation I use the same iterative divider for integer and for floating-point: https://github.com/mrisc32/mrisc32-a1/blob/master/rtl/muldiv/div_impl.vhd

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