SpinalHDL Alternatives

Similar projects and alternatives to SpinalHDL

• amaranth

  2 1,305 0.0 Python SpinalHDL VS amaranth

  A modern hardware definition language and toolchain based on Python

  

• chisel

  1 3,292 9.6 Scala SpinalHDL VS chisel

  Chisel: A Modern Hardware Design Language (by chipsalliance)

  

• Onboard AI

  getonboard.dev

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• litex

  1 2,490 0.0 C SpinalHDL VS litex

  Build your hardware, easily!

• chiselverify

  1 118 0.0 Scala SpinalHDL VS chiselverify

  A dynamic verification library for Chisel.

  

• circt

  1 1,397 0.0 C++ SpinalHDL VS circt

  Circuit IR Compilers and Tools

  

• litepcie

  1 414 0.0 Python SpinalHDL VS litepcie

  Small footprint and configurable PCIe core

• cocotb

  1 1,485 6.5 Python SpinalHDL VS cocotb

  cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

  

• InfluxDB

  www.influxdata.com

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• verilog-ethernet

  1 1,723 0.0 Verilog SpinalHDL VS verilog-ethernet

  Verilog Ethernet components for FPGA implementation

• chiseltest

  1 173 6.1 Scala SpinalHDL VS chiseltest

  The batteries-included testing and formal verification library for Chisel-based RTL designs.

  

• ao486

  2 319 0.0 C SpinalHDL VS ao486

  The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.

• myhdl

  1 966 0.0 Python SpinalHDL VS myhdl

  The MyHDL development repository

  

• corundum

  1 1,357 0.0 Verilog SpinalHDL VS corundum

  Open source FPGA-based NIC and platform for in-network compute

  

• chipyard

  1 1,298 0.0 C SpinalHDL VS chipyard

  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

  

• bsc

  1 838 0.0 Haskell SpinalHDL VS bsc

  Bluespec Compiler (BSC) (by B-Lang-org)

  

• litedram

  1 335 0.0 Python SpinalHDL VS litedram

  Small footprint and configurable DRAM core

• satcat5

  1 239 0.0 VHDL SpinalHDL VS satcat5

  SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.

  

• xfcp

  1 50 0.0 Verilog SpinalHDL VS xfcp

  Extensible FPGA control platform

• fault

  1 40 0.0 Python SpinalHDL VS fault

  A Python package for testing hardware (part of the magma ecosystem) (by leonardt)

• SBusFPGA

  1 40 0.0 Python SpinalHDL VS SBusFPGA

  Stuff to put a FPGA in a SBus system (SPARCstation)

• FPGA_RealTime_and_Static_Sobel_Edge_Detection

  1 33 0.0 Verilog SpinalHDL VS FPGA_RealTime_and_Static_Sobel_Edge_Detection

  Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

• SaaSHub

  www.saashub.com

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