xfcp

Extensible FPGA control platform (by alexforencich)

Xfcp Alternatives

Similar projects and alternatives to xfcp

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a better xfcp alternative or higher similarity.

xfcp reviews and mentions

Posts with mentions or reviews of xfcp. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-09-14.
  • Ethernet PC-FPGA interface
    1 project | /r/FPGA | 8 Mar 2022
    This is exactly what I created https://github.com/alexforencich/xfcp for - Ethernet and serial to multiple internal components, with the ability to enumerate said components.
  • Options for control and configuration of FPGA from PC
    1 project | /r/FPGA | 17 Dec 2021
    This is basically what I made XFCP for: https://github.com/alexforencich/xfcp
  • Share some github FPGA projects (bonus if they include C++, Python, or other files)
    15 projects | /r/FPGA | 14 Sep 2021
    Simple interface framework for connecting Python to FPGA designs over a serial port or over Ethernet: https://github.com/alexforencich/xfcp .
  • FPGA development live stream: FPGA board bring-up and testing of high-speed serializers
    1 project | /r/FPGA | 18 Mar 2021
    I'll use my XFCP project to interface with the FPGA from Python via a USB serial chip. This provides access to the I2C bus on the board, for configuring the PLL chips and interfacing with the QSFP28 optical transceivers. Additionally, it connects to the dynamic reconfiguration ports (DRP) on the GTY transceivers, and I'll use that for performing BER measurements at 25 Gbps through a handful of QSFP28 cables and optical modules. It looks like I might also have to do some fine-tuning of some of the analog parameters on the transceivers (namely pre-emphasis).
  • FPGA development live stream: FPGA board bring-up and testing
    1 project | /r/FPGA | 12 Mar 2021
    I recently acquired a pair of rather large FPGA boards that have a bunch of high-speed IO. I figure it might be interesting to show the process for bringing them up in terms of the reference clock generation and distribution components on the board for the high-speed serializers, as well as performing some simple sanity checks (BER testing) on all of the interfaces to make sure everything is operational. I'll use my XFCP project to interface with the FPGA from Python for configuring the clocking components over I2C and for performing the BER measurements on the GTY transceivers via DRP.
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Stats

Basic xfcp repo stats
5
51
0.0
12 months ago

alexforencich/xfcp is an open source project licensed under MIT License which is an OSI approved license.

The primary programming language of xfcp is Verilog.

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