fpga_riscv_cpu VS biriscv

Compare fpga_riscv_cpu vs biriscv and see what are their differences.

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fpga_riscv_cpu biriscv
1 6
8 749
- -
1.1 0.0
about 1 year ago over 2 years ago
Verilog Verilog
MIT License Apache License 2.0
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

fpga_riscv_cpu

Posts with mentions or reviews of fpga_riscv_cpu. We have used some of these posts to build our list of alternatives and similar projects.

biriscv

Posts with mentions or reviews of biriscv. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-06-21.

What are some alternatives?

When comparing fpga_riscv_cpu and biriscv you can also consider the following projects:

RISC-V - Design implementation of the RV32I Core in Verilog HDL with Zicsr extension

riscv - RISC-V CPU Core (RV32IM)

friscv - RISCV CPU implementation in SystemVerilog

darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Hazard3 - 3-stage RV32IMACZb* processor with debug

sdspi - SD-Card controller, using either SPI, SDIO, or eMMC interfaces

zipcpu - A small, light weight, RISC CPU soft core

vgasim - A Video display simulator

wbicapetwo - Wishbone to ICAPE interface conversion

kasirga_gok_2023 - Kasırga - Gök Sayısal İşlemci Kategorisi RISC-V İşlemci Tasarımı

kianRiscV - RISC-V Linux SoC, marchID: 0x2b