biriscv
32-bit Superscalar RISC-V CPU (by ultraembedded)
kasirga_gok_2023
Kasırga - Gök Sayısal İşlemci Kategorisi RISC-V İşlemci Tasarımı (by kirbyydoge)
| biriscv | kasirga_gok_2023 | |
|---|---|---|
| 6 | 1 | |
| 749 | 13 | |
| - | - | |
| 0.0 | 7.6 | |
| over 2 years ago | 11 months ago | |
| Verilog | Verilog | |
| Apache License 2.0 | GNU General Public License v3.0 only |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
biriscv
Posts with mentions or reviews of biriscv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-06-21.
kasirga_gok_2023
Posts with mentions or reviews of kasirga_gok_2023.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-06-21.
What are some alternatives?
When comparing biriscv and kasirga_gok_2023 you can also consider the following projects:
riscv - RISC-V CPU Core (RV32IM)
riscv-pk - RISC-V Proxy Kernel
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
collapseos - Bootstrap post-collapse technology
sdspi - SD-Card controller, using either SPI, SDIO, or eMMC interfaces
riscv-isa-manual - RISC-V Instruction Set Manual
zipcpu - A small, light weight, RISC CPU soft core
vgasim - A Video display simulator
wbicapetwo - Wishbone to ICAPE interface conversion
RISC-V - Design implementation of the RV32I Core in Verilog HDL with Zicsr extension
kianRiscV - RISC-V Linux SoC, marchID: 0x2b
FPGA_SDRAM_Controller - SDRAM controller optimized to a memory bandwidth of 316MB/s