Top 3 Verilog Xilinx Projects

• biriscv

  1 505 0.0 Verilog

  32-bit Superscalar RISC-V CPU

  Project mention: Не слабо так у турков бомбануло после сожжения Корана у посольства Турции в Стокгольме | reddit.com/r/tjournal_refugees | 2023-01-24

• wb2axip

  14 330 5.4 Verilog

  Bus bridges and other odds and ends

  Project mention: Simple skid buffer implementation | reddit.com/r/FPGA | 2023-01-10

  I've always been partial to my own skidbuffer article and implementation. (You'd expect me to be, they're my own ...) I get your point, though, about some applications needing a registered output. I've come across many, as requirements change from one project to the next. This is why, in my own implementation, I have parameters allowing me to adjust which implementation I'm using. In this case in particular, I have a parameter adjusting whether or not the output is registered. (The outgoing READY signal, though, is always registered--that's the point of the skid buffer in the first place, and what keeps it from being a regular buffer.)

• InfluxDB

  www.influxdata.com

  sponsored

  Build time-series-based applications quickly and at scale.. InfluxDB is the Time Series Platform where developers build real-time applications for analytics, IoT and cloud-native services. Easy to start, it is available in the cloud or on-premises.

  

• wbicapetwo

  1 5 0.0 Verilog

  Wishbone to ICAPE interface conversion

  Project mention: Can an FPGA program itself? | reddit.com/r/FPGA | 2022-07-21

Verilog Xilinx related posts

• Open-source RISC-V CPU projects for contribution
  8 projects | reddit.com/r/RISCV | 28 Jan 2023
• Testing Axi Slaves in Simulation
  1 project | reddit.com/r/FPGA | 4 Jan 2023
• Guys can u send me some github repositories on some simple project on system verilog with functionality like with couple functions ? Its my first reddit post in my life.
  1 project | reddit.com/r/FPGA | 14 Nov 2022
• A simple AXI-Lite register file
  1 project | reddit.com/r/FPGA | 24 Oct 2022
• AXI-Lite register bank revisited
  1 project | reddit.com/r/FPGA | 22 Oct 2022
• Connecting custom IP to microblaze
  1 project | reddit.com/r/FPGA | 24 Sep 2022
• Can an FPGA program itself?
  1 project | reddit.com/r/FPGA | 21 Jul 2022
• A note from our sponsor - SonarQube
  www.sonarqube.org | 2 Feb 2023

  Your projects are multi-language. So is SonarQube analysis. Find Bugs, Vulnerabilities, Security Hotspots, and Code Smells so you can release quality code every time. Get started analyzing your projects today for free. Learn more →

Index

Sponsored

SaaSHub - Software Alternatives and Reviews

SaaSHub helps you find the best software and product alternatives

www.saashub.com

Do not miss the trending Verilog projects with our weekly report!