Verilog Xilinx

Open-source Verilog projects categorized as Xilinx
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Top 3 Verilog Xilinx Projects

Xilinx

  • biriscv

    32-bit Superscalar RISC-V CPU

  • SaaSHub

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  • wb2axip

    Bus bridges and other odds and ends

  • wbicapetwo

    Wishbone to ICAPE interface conversion

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

Verilog Xilinx discussion

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Verilog Xilinx related posts

  • Open-source RISC-V CPU projects for contribution

    8 projects | /r/RISCV | 28 Jan 2023

  • Testing Axi Slaves in Simulation

    1 project | /r/FPGA | 4 Jan 2023

  • Guys can u send me some github repositories on some simple project on system verilog with functionality like with couple functions ? Its my first reddit post in my life.

    1 project | /r/FPGA | 14 Nov 2022

  • A simple AXI-Lite register file

    1 project | /r/FPGA | 24 Oct 2022

  • AXI-Lite register bank revisited

    1 project | /r/FPGA | 22 Oct 2022

  • Connecting custom IP to microblaze

    1 project | /r/FPGA | 24 Sep 2022

  • Can an FPGA program itself?

    1 project | /r/FPGA | 21 Jul 2022
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    www.saashub.com | 12 Oct 2024
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Index

What are some of the best open-source Xilinx projects in Verilog? This list will help you:

Project Stars
1 biriscv 838
2 wb2axip 480
3 wbicapetwo 8

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