fpga_riscv_cpu
fpga verilog risc-v rv32i cpu (by nobotro)
RISC-V
Design implementation of the RV32I Core in Verilog HDL with Zicsr extension (by AngeloJacobo)
fpga_riscv_cpu | RISC-V | |
---|---|---|
1 | 1 | |
8 | 45 | |
- | - | |
1.1 | 7.6 | |
about 1 year ago | 5 months ago | |
Verilog | Verilog | |
MIT License | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
fpga_riscv_cpu
Posts with mentions or reviews of fpga_riscv_cpu.
We have used some of these posts to build our list of alternatives
and similar projects.
RISC-V
Posts with mentions or reviews of RISC-V.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Prototype Demonstration of a 32-bit RISC-V Softcore with FreeRTOS
The project repository and the details about the paper can be found here.
What are some alternatives?
When comparing fpga_riscv_cpu and RISC-V you can also consider the following projects:
friscv - RISCV CPU implementation in SystemVerilog
biriscv - 32-bit Superscalar RISC-V CPU
Hazard3 - 3-stage RV32IMACZb* processor with debug
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
riscv - RISC-V CPU Core (RV32IM)