riscv VS cpu11

Compare riscv vs cpu11 and see what are their differences.

riscv

RISC-V CPU Core (RV32IM) (by ultraembedded)
risc-v Cpu Verilog Fpga Verilator Rv32im Rv32i riscv-linux pipeline-processor Asic Verification
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cpu11

Revengineered ancient PDP-11 CPUs, originals and clones (by 1801BM1)
pdp-11 Verilog Hdl Reverse Engineering cpucore Retrocomputing
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riscv cpu11
2 2
1,040 147
- -
1.8 5.3
over 2 years ago 5 months ago
Verilog Verilog
BSD 3-clause "New" or "Revised" License GNU General Public License v3.0 or later
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

riscv

Posts with mentions or reviews of riscv. We have used some of these posts to build our list of alternatives and similar projects.

cpu11

Posts with mentions or reviews of cpu11. We have used some of these posts to build our list of alternatives and similar projects.

What are some alternatives?

When comparing riscv and cpu11 you can also consider the following projects:

biriscv - 32-bit Superscalar RISC-V CPU

open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

PDP-11 - A collection of PDP-11 related files

darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

serv - SERV - The SErial RISC-V CPU

zipcpu - A small, light weight, RISC CPU soft core

hdl - HDL libraries and projects

Toast-RV32i - Pipelined RISC-V RV32I Core in Verilog

livehd - Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation

uhd - The USRP™ Hardware Driver Repository

riscv vs biriscv cpu11 vs open-fpga-verilog-tutorial riscv vs openlane cpu11 vs PDP-11 riscv vs darkriscv cpu11 vs serv riscv vs zipcpu cpu11 vs hdl riscv vs Toast-RV32i cpu11 vs livehd riscv vs uhd cpu11 vs openlane