fpga-fft
neorv32
| fpga-fft | neorv32 | |
|---|---|---|
| 1 | 77 | |
| 87 | 1,429 | |
| - | - | |
| 0.0 | 9.9 | |
| about 3 years ago | 2 days ago | |
| VHDL | C | |
| GNU General Public License v3.0 or later | BSD 3-clause "New" or "Revised" License |
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fpga-fft
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FPGA with DSP - which board and which FREE(!) software? 1M/s , 24bit FFT, FFT Ip?
Also, what is a small FFT for you? If I recall right the Xilinx FFT core is up to 2^16.. If you want to make a bigger FFT you need to divide it in little FFTs like this algorithm https://github.com/owocomm-0/fpga-fft
neorv32
- An example of how to add the A ISA extension's LR/SC operations into an open-source architecture
- NEORV32 - A tiny, customizable and highly extensible MCU-class 32-bit RISC-V microcontroller-like SoC written in platform-independent VHDL
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Recommendations for RISC-V on FPGA
How about NEORV32?
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SUGGEST AN OPEN SOURCE RISC-V CORE DESIGNED IN VERILOG
GitHub - stnolting/neorv32: 🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. this one is good but is written in VHDL though
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RISCV CPU using PL on Pynq Z2 Development Board
NEORV32 is an open source soft core and very well documented. I would recommend you to take a look at it and play around a bit. And it is certainly possible to have a soft core running on only the PL side without PS interference.
- A tiny 1-Wire controller for FPGAs (in VHDL)
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Anyone want to share some embedded projects they have done?
Maybe not a classic (whatever that means...) project, but I am working (together with others) on a RISC-V microcontroller for FPGAs: https://github.com/stnolting/neorv32
What are some alternatives?
forth-cpu - A Forth CPU and System on a Chip, based on the J1, written in VHDL
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
DSP - Digital Signal Processing Library for Xilinx Platforms. Digital IIR/FIR filters, GHz rate non-linear pulse fitting, and data acquisition systems.
linux-on-litex-vexriscv - Linux on LiteX-VexRiscv
SoC - Github Repo for Embedded FPGA course by Vincent Claes
picoMIPS - picoMIPS processor doing affine transformation
fpga_torture - 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
upduino-projects - Various VHDL projects I've worked on for the Upduino v2.0 and v3.0
chipyard - An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
lxp32-cpu - A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
fpga-zynq - Support for Rocket Chip on Zynq FPGAs
serv - SERV - The SErial RISC-V CPU