riscv_verilator_model
RISCV model for Verilator/FPGA targets (by aignacio)
neorv32
:rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. (by stnolting)
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riscv_verilator_model | neorv32 | |
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2 | 77 | |
40 | 1,423 | |
- | - | |
0.0 | 9.9 | |
over 4 years ago | 2 days ago | |
C | C | |
Apache License 2.0 | BSD 3-clause "New" or "Revised" License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
riscv_verilator_model
Posts with mentions or reviews of riscv_verilator_model.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-08-29.
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RISCV sim through Verilator
So far I have found only this repo : https://github.com/aignacio/riscv_verilator_model.git (does not work for me yet)
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Need help in CPU design
https://github.com/aignacio/riscv_verilator_model Good start...
neorv32
Posts with mentions or reviews of neorv32.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-03-08.
- An example of how to add the A ISA extension's LR/SC operations into an open-source architecture
- NEORV32 - A tiny, customizable and highly extensible MCU-class 32-bit RISC-V microcontroller-like SoC written in platform-independent VHDL
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Recommendations for RISC-V on FPGA
How about NEORV32?
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SUGGEST AN OPEN SOURCE RISC-V CORE DESIGNED IN VERILOG
GitHub - stnolting/neorv32: 🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. this one is good but is written in VHDL though
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RISCV CPU using PL on Pynq Z2 Development Board
NEORV32 is an open source soft core and very well documented. I would recommend you to take a look at it and play around a bit. And it is certainly possible to have a soft core running on only the PL side without PS interference.
- A tiny 1-Wire controller for FPGAs (in VHDL)
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Anyone want to share some embedded projects they have done?
Maybe not a classic (whatever that means...) project, but I am working (together with others) on a RISC-V microcontroller for FPGAs: https://github.com/stnolting/neorv32
What are some alternatives?
When comparing riscv_verilator_model and neorv32 you can also consider the following projects:
serv - SERV - The SErial RISC-V CPU
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
gdb-stub - gdb-proxy implementation for bonfire
linux-on-litex-vexriscv - Linux on LiteX-VexRiscv
picoMIPS - picoMIPS processor doing affine transformation
upduino-projects - Various VHDL projects I've worked on for the Upduino v2.0 and v3.0
chipyard - An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
lxp32-cpu - A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
fpga-zynq - Support for Rocket Chip on Zynq FPGAs
linux-on-litex-rocket - Run 64-bit Linux on LiteX + RocketChip
riscv_verilator_model vs serv
neorv32 vs VexRiscv
riscv_verilator_model vs gdb-stub
neorv32 vs linux-on-litex-vexriscv
riscv_verilator_model vs picoMIPS
neorv32 vs picoMIPS
neorv32 vs upduino-projects
neorv32 vs chipyard
neorv32 vs lxp32-cpu
neorv32 vs fpga-zynq
neorv32 vs linux-on-litex-rocket
neorv32 vs serv