risc-v-single-cycle
A Single Cycle Risc-V 32 bit CPU (by martinKindall)
scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog (by syntacore)
risc-v-single-cycle | scr1 | |
---|---|---|
1 | 2 | |
21 | 776 | |
- | 1.4% | |
10.0 | 3.0 | |
about 1 year ago | 28 days ago | |
SystemVerilog | SystemVerilog | |
- | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
risc-v-single-cycle
Posts with mentions or reviews of risc-v-single-cycle.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-12-26.
-
My first Risc-V core in FPGA
Code is here: https://github.com/martinKindall/risc-v-single-cycle
scr1
Posts with mentions or reviews of scr1.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-07-04.
-
Looking for a suitable open-source RISC-V for an embedded project
Would this be suitable? https://github.com/syntacore/scr1 I haven't used it, but I saw it in Riscduino project which continues to appear in Open MPWs.
- Mikron MIK32 – Made in Russia 32-bit RISC-V MCU... for about $6
What are some alternatives?
When comparing risc-v-single-cycle and scr1 you can also consider the following projects:
learn-fpga - Learning FPGA, yosys, nextpnr, and RISC-V
riscv-simple-sv - A simple RISC V core for teaching
Arithmetic-Circuits - This repository contains different modules which execute arithmetic operations.
FPGA-Video-Processing - Realtime video processing w/ Gaussian + Sobel Filters targeting Artix-7 FPGA
mips_cpu - Single Cycle 32 bit MIPS
friscv - RISCV CPU implementation in SystemVerilog
Cores-VeeR-EH1 - VeeR EH1 core
Cores-VeeR-EL2 - VeeR EL2 Core
basys3_fpga_sandbox - Learning the basics of Systemverilog, testbench and more.
clic - RISC-V fast interrupt controller
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
ibex - Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
risc-v-single-cycle vs learn-fpga
scr1 vs riscv-simple-sv
risc-v-single-cycle vs Arithmetic-Circuits
scr1 vs FPGA-Video-Processing
risc-v-single-cycle vs mips_cpu
scr1 vs friscv
risc-v-single-cycle vs Cores-VeeR-EH1
scr1 vs Cores-VeeR-EL2
risc-v-single-cycle vs basys3_fpga_sandbox
scr1 vs clic
scr1 vs VexRiscv
scr1 vs ibex