learn-fpga VS serv

I've followed this tutorial recently, and it's amazing:

https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/...

The author includes detailed instruction for how to build a micro-controller in Verilog on an icestick, starting from a very simple blinker all the way to a functional RISC-V core.

My other suggestion would be: for most of the toolchain, skip your package manager and directly install the binary artifacts published on this Github repo:

https://github.com/YosysHQ/oss-cad-suite-build

You'll spare yourself a world of pain.

You might want to look at https://github.com/BrunoLevy/learn-fpga

Lattice Icestick is pretty cheap and has just enough LUTs to run a small riscv. Also check out https://github.com/BrunoLevy/learn-fpga

Thanks Bruno Levy

These are good starting points: https://github.com/BrunoLevy/learn-fpga/ and, from there, https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/README.md.

The best point-of-entry for "tiny" MCUs these days is FemtoRV32-Quark or SERV. I also maintain my own small RISC-V core (Minimax), though it's early on in graduating from "experiment" to "real design".

Rust blinky on RISC-V soft core If you were looking for, an introduction example of an embedded Rust program, running on a RISC-V soft core, check out this blinky that is using the FemtoRV .

Nope - that's all there is.

It's possible to be incredibly expressive in Verilog and VHDL. This implementation is written in VHDL, which has an outdated reputation for being long-winded.

Also worth a look: FemtoRV32 Quark [0], which is written in Verilog.

[0]: https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/...

> Right now, most devices on the market do not support the C extension

This is not true and easily verifiable.

The C extension is defacto required, the only cores that don't support it are special purpose soft cores.

C extension in the smallest IP available core https://github.com/olofk/serv?tab=readme-ov-file

Supports M and C extensions https://github.com/YosysHQ/picorv32

Another sized optimized core with C extension support https://github.com/lowrisc/ibex

C extension in the 10 cent microcontroller https://www.wch-ic.com/products/CH32V003.html

This one should get your goat, it implements as much as it can using only compressed instructions https://github.com/gsmecher/minimax

In short: it works, though the implementation lacks the crystal clarity of FemtoRV32 and PicoRV32. The core is larger than SERV but has higher IPC and (very arguably) a more conventional implementation. The compressed instruction set is easier to expand into regular RV32I instructions than it is to execute directly.

https://github.com/olofk/serv

As for the size advantage: this mattered more when LUTs were precious and when PicoBlaze's competition was either similarly unorthodox (J1 Forth CPU) or several times larger (MicroBlaze). Nowadays, there are very small RISC-V cores like FemtoRV32 Quark or SERV. RISC-V benefits from mainstream open-source tooling and has momentum that's hard to beat.

The RISC-V spec does allow non-trapping behavior and SeRV in particular has non-trapping behavior, which is an important part of how it can fit into 200 4-input LUTs.

https://github.com/olofk/serv#good-to-know